Capacitor: Charge, Energy, V-I Relationship (I = C dV/dt)
Learn the capacitor's Q=CV, energy W=½CV², and I=C dV/dt relationships with a worked example and practical design implications for engineers.
Contents & prerequisites
Every switching regulator, decoupling network, ADC sample-and-hold stage, and RC filter in a real design lives or dies by one relationship: the current into a capacitor depends on how fast its voltage is changing, not on the voltage itself. Misjudging this — for example, assuming a decoupling cap can respond instantly, or forgetting that a capacitor's voltage cannot jump — is one of the most common sources of blown-up transient simulations and mysterious ringing on a board. Getting the charge/energy/current-voltage relationship solid is foundational for everything downstream: RC time constants, filter design, switching converter ripple, and signal integrity analysis.
Charge Storage: Q = CV
A capacitor stores charge on two conductive plates separated by a dielectric. The defining relationship is:
Q = C·V
Q— charge stored, in coulombs (C)C— capacitance, in farads (F), a property of geometry and dielectric materialV— voltage across the capacitor's terminals
Capacitance itself, for a simple parallel-plate structure, is:
C = ε·A / d
where ε is the permittivity of the dielectric, A is plate area, and d is plate separation. This shows capacitance is a fixed physical property — it doesn't depend on the applied voltage or current (for an ideal, linear capacitor). What varies is how much charge sits on the plates for a given voltage.
A useful mental model: think of C as a "charge-per-volt" constant. Double the voltage, double the stored charge, for the same physical capacitor.
Energy Stored in a Capacitor
Charging a capacitor from 0 V to V doesn't happen at constant voltage — the voltage ramps up as charge accumulates, so the energy delivered isn't simply Q·V. Integrating the incremental work dW = V·dq = (q/C)·dq from 0 to Q gives:
W = ½·C·V² = ½·Q·V = Q²/(2C)
All three forms are equivalent; use whichever matches the known variables. Note the factor of ½ — a common error is to drop it by analogy with resistive power dissipation, which has no such factor.
Key distinction: this energy is stored in the electric field between the plates, not dissipated. In an idealized lossless charging process, if you charge a capacitor through a resistor from an ideal voltage source, exactly half the source energy ends up stored in the capacitor and the other half is dissipated in the resistor — regardless of the resistor's value. This is a classic result worth remembering: W_R = W_C = ½·C·V² for a step charge into an initially-uncharged cap.
The V-I Relationship: I = C dV/dt
Differentiating Q = C·V with respect to time (with C constant) gives the capacitor's defining current-voltage law:
I = C · dV/dt
This says: current into a capacitor is proportional to the rate of change of its voltage, not the voltage itself. Consequences that matter in practice:
- DC blocking: if
Vis constant,dV/dt = 0, soI = 0. A capacitor is an open circuit at steady-state DC. - Voltage cannot change instantaneously across a capacitor for finite current. An instant jump in
Vwould requiredV/dt → ∞, hence infinite current — physically impossible with any real source. This is why capacitor voltage is a valid state variable in circuit analysis (it can't jump; it's continuous). - Fast voltage transitions demand large currents. A steep edge (small
dt) forces largeIfor a givenCandΔV. This is precisely why decoupling capacitors must be low-ESR/low-ESL — a fast digital edge demands a large instantaneous current, and any series parasitic impedance produces an unwanted voltage spike.
The dual (integral) form is equally useful:
V(t) = V(t₀) + (1/C)·∫ I(t)·dt [integrated from t₀ to t]
This shows a capacitor is fundamentally an integrator of current — the basis of integrator op-amp circuits and of the Miller integration effect in feedback amplifiers.
Worked Example: Constant-Current Charging
A 100 nF capacitor is charged from 0 V by an ideal 2 mA constant-current source for 50 μs. Find the final voltage and the energy stored.
Step 1 — rearrange I = C dV/dt for constant current:
Since I is constant, dV/dt = I/C is also constant, so voltage ramps linearly:
ΔV = I·Δt / C
Step 2 — plug in numbers:
ΔV = (2×10⁻³ A × 50×10⁻⁶ s) / (100×10⁻⁹ F)
= (1×10⁻⁷ C) / (1×10⁻⁷ F)
= 1.0 V
So the capacitor charges from 0 V to 1.0 V over 50 μs.
Step 3 — energy stored:
W = ½·C·V² = ½ × 100×10⁻⁹ × (1.0)² = 50×10⁻⁹ J = 50 nJ
Check via charge: Q = C·V = 100×10⁻⁹ × 1.0 = 100 nC. Independently, Q = I·t = 2×10⁻³ × 50×10⁻⁶ = 100×10⁻⁹ C = 100 nC. ✓ Both methods agree, confirming the ramp calculation is consistent.
Check via energy delivered by source: the source delivers W_source = ∫V·I dt over the ramp. Since V rises linearly from 0 to 1.0 V while I is constant at 2 mA, average voltage is 0.5 V, so W_source = 0.5 V × 2×10⁻³ A × 50×10⁻⁶ s = 50 nJ. This matches W = ½CV² exactly (as expected — with a current source, not a resistor in series, there's no dissipative element, so all delivered energy is stored). ✓
Series and Parallel Capacitor Combinations
Capacitors combine oppositely to resistors:
| Configuration | Formula | Intuition |
|---|---|---|
| Parallel | C_total = C₁ + C₂ + ... | Plate areas effectively add |
| Series | 1/C_total = 1/C₁ + 1/C₂ + ... | Effective plate separation adds |
For two capacitors in series: C_total = (C₁·C₂)/(C₁+C₂) — same product-over-sum form as parallel resistors, a frequent source of confusion if not memorized separately from the resistor rules.
Practical Implications
- Decoupling/bypass capacitors: sized to supply the fast
dIa load demands without an excessivedVdroop on the rail — directly fromI = C dV/dtrearranged asC = I·Δt/ΔV. - Switching converter output ripple: capacitor ripple voltage is calculated from the integral form,
ΔV = ΔQ/C, whereΔQis the charge imbalance during the switching cycle. - ADC sample-and-hold: the acquisition time must allow the hold capacitor to charge to within the required accuracy through the source resistance — an RC charging problem built directly on this V-I law.
- Slew-rate limiting in op-amps: internal compensation capacitors combined with limited output drive current set the maximum
dV/dtan amplifier can produce, i.e.slew rate = I_max/C_comp. - Non-ideal capacitors: real parts have ESR (series resistance) and ESL (series inductance) that modify this ideal behavior at high frequency — covered in detail under non-ideal component parasitics.
Key Takeaways
Q = C·Vdefines stored charge; capacitanceCis a fixed geometric/material property for an ideal linear capacitor.- Stored energy is
W = ½CV² = ½QV = Q²/(2C)— the ½ factor comes from integrating variable voltage during charging, not a shortcut likeP = IV. - The governing dynamic law is
I = C·dV/dt: capacitor current depends on the rate of change of voltage, making capacitor voltage continuous (it cannot jump instantaneously) and making the capacitor act as a current integrator. - At true DC (
dV/dt = 0) a capacitor draws zero current and behaves as an open circuit; fast transients demand large instantaneous currents, which is why low-ESR/ESL matters for decoupling. - Series and parallel capacitor combination rules are the mirror image of resistor rules — parallel capacitances add directly, series capacitances combine via the reciprocal (product-over-sum) formula.
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