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Kirchhoff's Current Law (KCL) and Node Analysis

Learn Kirchhoff's Current Law and node analysis with a full worked example, supernode technique, and comparison to mesh analysis for circuit solving.

7 min readAhmet Zahid ArıcanUpdated 11 Sept 2026
Contents & prerequisites

Every SPICE simulator, every op-amp feedback analysis, and every power distribution network check ultimately reduces to one bookkeeping rule: charge cannot pile up at a node. Kirchhoff's Current Law (KCL) formalizes that conservation principle, and node (nodal) analysis turns it into the single most widely used systematic method for solving circuits — it's the algorithm behind Modified Nodal Analysis (MNA), the technique every SPICE engine uses internally.

Statement of KCL

KCL: The algebraic sum of all currents entering a node equals zero.

Σ I_in = 0        (currents into the node, signed)

Equivalently: the sum of currents entering a node equals the sum of currents leaving it. This follows directly from conservation of charge — a node is an ideal wire junction with zero volume, so it cannot accumulate or store charge. If it did, the node voltage would need to change instantaneously for any nonzero net current, which is nonphysical for a lumped node.

Sign convention is arbitrary but must be applied consistently: pick currents entering as positive and leaving as negative (or vice versa). For a node with three branches carrying currents I₁, I₂, I₃ all defined as flowing into the node:

I₁ + I₂ + I₃ = 0

If a branch current's reference direction is actually leaving, its solved value will simply come out negative — KCL doesn't require you to guess the correct physical direction in advance.

Node (Nodal) Analysis Procedure

Node analysis uses KCL at every non-reference node to generate a system of equations in node voltages, then solves for those voltages directly. Steps:

  1. Pick a reference (ground) node — usually the node with the most connections, defined as 0 V.
  2. Label the remaining node voltages V₁, V₂, … Vₙ (measured with respect to ground).
  3. Write one KCL equation per non-reference node, expressing each branch current using Ohm's law in terms of node voltages: current out of node k through a resistor R toward node j is (Vk − Vj)/R.
  4. Handle sources:
    • An independent current source contributes a fixed known term.
    • An independent voltage source between two non-reference nodes forces a constraint (a "supernode") — combine the two nodes' KCL equations into one, and add the constraint Vk − Vj = Vsource.
    • A voltage source with one terminal at ground simply fixes that node's voltage directly — no KCL equation is needed there.
  5. Solve the resulting linear system (n equations, n unknowns) for the node voltages.
  6. Back-substitute to find any branch current or voltage of interest.

This produces exactly n equations for n unknown node voltages (one fewer than the total node count, since the reference node is known), which is why node analysis is efficient — it generally requires fewer equations than mesh analysis when a circuit has more loops than nodes.

Worked Example

Consider a circuit with a 12 V source, three resistors, and one independent current source:

        R1=4Ω           R2=6Ω
  12V ---/\/\--- V1 ---/\/\--- V2 --- (to ground via R3=3Ω)
   +           |                |
  ---          |                ^
  gnd          |              2A (into V2, i.e. sourced
               |               from ground up into node V2)
              gnd

Node V1 connects to the 12 V source through R1, and to node V2 through R2 (no direct resistor to ground at V1 in this example — all its current paths are through R1 and R2). Node V2 connects to V1 through R2, to ground through R3, and receives 2 A injected from an independent current source.

KCL at V1 (currents leaving V1 sum to zero):

(V1 − 12)/4 + (V1 − V2)/6 = 0

KCL at V2 (currents leaving V2 sum to zero, with the 2 A source injecting current in):

(V2 − V1)/6 + V2/3 − 2 = 0

Multiply the first equation by 12 (LCM of 4 and 6):

3(V1 − 12) + 2(V1 − V2) = 0
3V1 − 36 + 2V1 − 2V2 = 0
5V1 − 2V2 = 36        ...(1)

Multiply the second equation by 6 (LCM of 6 and 3):

(V2 − V1) + 2V2 − 12 = 0
−V1 + 3V2 = 12          ...(2)

From (2): V1 = 3V2 − 12. Substitute into (1):

5(3V2 − 12) − 2V2 = 36
15V2 − 60 − 2V2 = 36
13V2 = 96
V2 = 7.385 V
V1 = 3(7.385) − 12 = 10.154 V

Verification (KCL check at both nodes):

At V1: (10.154 − 12)/4 + (10.154 − 7.385)/6 = −0.4615 + 0.4615 = 0.000

At V2: (7.385 − 10.154)/6 + 7.385/3 − 2 = −0.4615 + 2.4615 − 2 = 0.000

Both nodes balance to within rounding, confirming the solution. Branch currents follow directly: current through R1 is (12 − 10.154)/4 = 0.4615 A, matching the −0.4615 A leaving V1 toward the source (i.e., 0.4615 A flowing from the source into V1).

Supernodes: Handling Floating Voltage Sources

When a voltage source sits between two non-reference nodes (neither terminal grounded), you cannot write an independent Ohm's-law current expression through it — the source's internal current is unknown and unconstrained by its own V-I relationship. The fix is the supernode technique:

  1. Enclose both nodes and the source in a single boundary ("supernode").
  2. Write one KCL equation summing all currents leaving that boundary (ignoring the internal source branch entirely — it's inside the boundary and its current doesn't cross it).
  3. Add the constraint equation V_node_a − V_node_b = V_source to close the system.

This preserves exactly n equations for n unknowns while correctly capturing the source's effect on the rest of the circuit.

Node Analysis vs. Mesh Analysis

AspectNode Analysis (KCL)Mesh Analysis (KVL)
UnknownsNode voltagesLoop (mesh) currents
Best suited forCircuits with many parallel branches, few nodesPlanar circuits with many series loops, few meshes
Awkward caseFloating voltage sources (needs supernode)Current sources shared between meshes (needs supermesh)
GeneralityWorks for planar and non-planar circuitsOnly directly applies to planar circuits
SPICE relevanceBasis of Modified Nodal Analysis (MNA), used in essentially all SPICE enginesRarely used computationally at scale

Node analysis's generality (it doesn't require a planar circuit) and its direct mapping onto how netlists are structured (nodes and branch elements) is exactly why it — extended into MNA to also handle voltage sources and inductors — is the standard internal method in SPICE-class simulators.

Practical Design Implications

  • Ground reference choice matters for clarity, not correctness — any node can serve as the 0 V reference; choosing the one with the most connections (often the return/ground plane in a real PCB) minimizes the number of equations.
  • Op-amp virtual ground/short analysis is a direct application of KCL — summing currents into the inverting node of an ideal op-amp (with input current = 0) is the standard derivation for inverting-amplifier and summing-amplifier gain equations.
  • Current-sense and power-rail sanity checks in real hardware debug rely on KCL: if measured currents into a supply node don't sum to zero within measurement tolerance, look for an unaccounted leakage path, an unmodeled parasitic, or an instrumentation error.
  • Supernodes generalize cleanly to dependent sources (as found in transistor small-signal models), which is why node analysis is the natural framework for amplifier gain derivations.

Key Takeaways

  • KCL states that the net current into any node is zero — a direct consequence of charge conservation at a lumped, zero-capacitance junction.
  • Node analysis writes one KCL equation per non-reference node (in terms of node voltages via Ohm's law), producing n equations for n unknowns.
  • Floating voltage sources between two non-reference nodes require the supernode technique: combine the KCL equations and add a voltage constraint.
  • Node analysis generalizes to non-planar circuits and maps directly onto netlist structure, which is why it (as Modified Nodal Analysis) underlies virtually all SPICE simulators.
  • Always verify a node-analysis solution by re-summing currents at each node — if KCL doesn't close to zero, an equation or sign convention has an error.

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