Analog ElectronicsJuniorcommon

NMOS/PMOS I-V Characteristics: Triode and Saturation Regions

Learn the NMOS/PMOS triode and saturation I-V equations, region boundaries, and a worked design example with a boundary-condition check.

6 min readAhmet Zahid ArıcanUpdated 11 Sept 2026
Contents & prerequisites

Every MOSFET-based circuit — from a switching regulator's power stage to a differential pair's tail current source — depends on knowing which region of operation the device sits in. Get triode confused with saturation and a "current source" becomes a resistor, a switch stops looking like a switch, or a gain stage loses all its gain. The I-V equations for NMOS and PMOS are the working vocabulary for every hand calculation before SPICE takes over.

Terminal Voltages and Sign Conventions

For an NMOS device, current flows from drain to source when the gate is biased above threshold. The governing voltages are:

  • V_GS — gate-to-source voltage, must exceed threshold V_T to form a conducting channel
  • V_DS — drain-to-source voltage, drives current through the channel
  • V_OV = V_GS − V_T — the overdrive (or effective gate) voltage, a direct measure of how hard the device is turned on

PMOS is the mirror image: source sits at the higher potential, V_SG and V_SD are the relevant positive quantities, and V_T is negative by convention (or you work with |V_T| and flip every inequality). All the equations below are written for NMOS; for PMOS, substitute V_SG for V_GS, V_SD for V_DS, and use |V_T|.

The Three Regions

A MOSFET's behavior is entirely determined by comparing V_GS to V_T and V_DS to V_OV:

RegionConditionChannel behavior
CutoffV_GS < V_TNo inversion channel, I_D ≈ 0
Triode (linear/ohmic)V_GS > V_T and V_DS < V_OVChannel exists end-to-end, acts as voltage-controlled resistor
SaturationV_GS > V_T and V_DS ≥ V_OVChannel pinches off near drain, current controlled by V_GS only

The boundary condition V_DS = V_OV is the pinch-off point — the same equation evaluated from either side gives a continuous (though not smooth in slope) transition between regions.

Triode Region Equation

In triode, the MOSFET behaves like a gate-voltage-controlled resistor. The long-channel square-law model gives:

I_D = k'_n · (W/L) · [(V_GS − V_T)·V_DS − V_DS²/2]

where k'_n = μ_n·C_ox is the process transconductance parameter (μ_n = electron mobility, C_ox = gate oxide capacitance per unit area), and W/L is the transistor's aspect ratio.

For small V_DS (deep triode, V_DS ≪ V_OV), the quadratic term is negligible and the device looks resistive:

I_D ≈ k'_n · (W/L) · V_OV · V_DS
R_DS(on) ≈ 1 / [k'_n · (W/L) · V_OV]

This is the basis for MOSFET-as-switch design: R_DS(on) drops as W/L or V_OV increases, which is why power MOSFET datasheets specify R_DS(on) at a stated V_GS.

Saturation Region Equation

Once V_DS reaches V_OV, the channel pinches off at the drain end and further increases in V_DS no longer increase current (to first order). The current saturates at:

I_D = (k'_n/2) · (W/L) · (V_GS − V_T)² · (1 + λ·V_DS)

The (1 + λ·V_DS) factor accounts for channel-length modulation — the real, slight increase in current with V_DS due to the pinch-off point shifting toward the source as V_DS rises, effectively shortening the channel. λ is inversely proportional to L, which is why long-channel devices have flatter output curves (higher output resistance r_o = 1/(λ·I_D)).

Without channel-length modulation (ideal, λ = 0), saturation current depends only on V_GS — this is the "current source" behavior exploited in current mirrors, active loads, and differential pairs.

Worked Example

An NMOS device has k'_n·(W/L) = 2 mA/V², V_T = 0.7 V, λ = 0.02 V⁻¹. Find I_D for V_GS = 1.7 V at (a) V_DS = 0.3 V and (b) V_DS = 2 V.

Step 1 — overdrive voltage: V_OV = V_GS − V_T = 1.7 − 0.7 = 1.0 V

Step 2 — region check for (a), V_DS = 0.3 V: Since V_DS = 0.3 V < V_OV = 1.0 V, the device is in triode.

I_D = k'_n(W/L) · [V_OV·V_DS − V_DS²/2]
    = 2 mA/V² · [1.0·0.3 − 0.3²/2]
    = 2 mA/V² · [0.30 − 0.045]
    = 2 mA/V² · 0.255 V²
    = 0.51 mA

Step 3 — region check for (b), V_DS = 2 V: Since V_DS = 2 V > V_OV = 1.0 V, the device is in saturation.

I_D = (k'_n/2)(W/L) · V_OV² · (1 + λ·V_DS)
    = (2/2) mA/V² · (1.0)² · (1 + 0.02·2)
    = 1 mA/V² · 1.0 · 1.04
    = 1.04 mA

Verification: at the triode/saturation boundary itself, V_DS = V_OV = 1.0 V, triode and saturation formulas should agree (ignoring λ). Triode: I_D = 2·[1.0·1.0 − 0.5] = 1.0 mA. Saturation with λ = 0: I_D = 1·(1.0)² = 1.0 mA. They match, confirming the model is self-consistent at the boundary. The λ term only nudges the saturation value upward for V_DS beyond that point, exactly as seen in step 3 (1.04 mA vs. the boundary's 1.0 mA).

PMOS: Same Equations, Flipped Polarities

PMOS conduction requires V_SG > |V_T|, and the same square-law equations apply with V_SG, V_SD, and |V_T| in place of their NMOS counterparts. Because hole mobility μ_p is roughly 2–3× lower than electron mobility μ_n in bulk silicon, a PMOS device needs proportionally larger W/L to match an NMOS device's drive strength — the reason PMOS transistors in CMOS gates are typically drawn 2–3× wider than the NMOS pull-down.

Reading the I-V Curve Family

A plot of I_D vs. V_DS for several fixed V_GS values (the standard "family of curves") shows:

  • Triode region (left side): curves rise steeply and roughly linearly near the origin, then bend over as V_DS approaches V_OV.
  • Pinch-off locus: the dashed parabola I_D = (k'_n/2)(W/L)·V_DS² (setting V_OV = V_DS) traces the boundary separating triode from saturation across all curves.
  • Saturation region (right side): curves flatten out but slope slightly upward due to channel-length modulation; extrapolating each curve backward, they all cross the V_DS axis near −1/λ (the Early-voltage-like analogy for MOSFETs).

Design Implications

  • Switch design: operate deep in triode with maximum V_OV to minimize R_DS(on) and conduction loss.
  • Amplifier/current-source design: operate in saturation with adequate V_DS headroom above V_OV to keep r_o high and gain (g_m·r_o) large.
  • Headroom budgeting: in low-voltage analog design, V_OV is often deliberately kept small (100–200 mV) to leave more V_DS swing available, at the cost of lower g_m for a given current.
  • Short-channel reality: modern processes deviate from the square law (velocity saturation, DIBL), so treat these equations as first-pass hand-calculation tools, then verify with SPICE model parameters from the actual process.

Key Takeaways

  • Three regions — cutoff, triode, saturation — are distinguished by comparing V_GS to V_T and V_DS to the overdrive voltage V_OV = V_GS − V_T.
  • Triode: I_D = k'_n(W/L)·[V_OV·V_DS − V_DS²/2], behaves as a voltage-controlled resistor; used for switches.
  • Saturation: I_D = (k'_n/2)(W/L)·V_OV²·(1 + λ·V_DS), current set mainly by V_GS; used for gain stages and current sources.
  • The two formulas agree exactly at the triode/saturation boundary V_DS = V_OV, a useful self-check on any hand calculation.
  • PMOS follows identical equations with V_SG, V_SD, |V_T|, and requires larger W/L than NMOS to compensate for lower hole mobility.

Learning

Sign in to track your progress.

Evidence

Public projects engineers linked to NMOS/PMOS I-V Characteristics: Triode and Saturation Regions.

Add evidence

No engineer has linked a project to this topic yet. Built something that proves it? Add the project and tag it with analog-electronics-nmospmos-i-v-characteristics-triode-and-saturation — it then shows here and on your public profile.