RC Circuit: Time Constant τ = RC, Charging/Discharging

Every debounce filter, power-on reset delay, decoupling network, and analog low-pass filter in a real design reduces to the same first-order differential equation. Understanding the RC time constant τ = RC — and being able to predict voltage at any instant during charge or discharge — is the difference between guessing at capacitor values and sizing them correctly on the first pass.

The Governing Equation

Consider a series resistor R and capacitor C driven by a step voltage source Vs, capacitor initially at V₀. KVL around the loop gives:

Vs = i·R + Vc

Since the capacitor current is i = C·dVc/dt, substituting gives a first-order linear ODE:

Vs = RC·dVc/dt + Vc

The solution, with initial condition Vc(0) = V₀, is:

Vc(t) = Vs + (V₀ − Vs)·e^(−t/τ),   τ = RC

This single equation covers both charging and discharging — only the initial and final voltages change. τ has units of seconds when R is in ohms and C is in farads (Ω·F = (V/A)·(A·s/V) = s).

Charging

Charging from 0 V toward a supply Vs (V₀ = 0):

Vc(t) = Vs·(1 − e^(−t/τ))
i(t)  = (Vs/R)·e^(−t/τ)

At t = 0, the capacitor looks like a short circuit (Vc = 0), so all of Vs drops across R and current is at its maximum, Vs/R. As t → ∞, current decays to zero and the capacitor sits at Vs — behaving like an open circuit in steady state. This "short at t=0, open at t=∞" mental model is the fastest sanity check for any RC transient.

Discharging

Discharging from Vs toward 0 V (Vs = 0 in the general formula, V₀ = Vs):

Vc(t) = Vs·e^(−t/τ)
i(t)  = -(Vs/R)·e^(−t/τ)

The current is the mirror image of the charging current, just flowing in the opposite direction, and both voltage and current decay exponentially from their initial value toward zero.

The Meaning of τ

τ is the time for the exponential term to fall to 1/e ≈ 0.368 of its initial value. It is not the time to fully charge or discharge — the exponential never mathematically reaches zero, only asymptotically approaches it.

The 5τ rule is the standard engineering approximation: a capacitor is considered "fully" charged or discharged after 5 time constants, at which point it's within 0.7% of its final value — usually below measurement noise floor and well within component tolerance.

Worked Example

A 10 kΩ resistor and 100 nF capacitor are in series across a 5 V step, capacitor initially at 0 V. Find Vc at t = 1 ms, and the time to reach 4.5 V.

Step 1 — compute τ:

τ = RC = 10,000 Ω × 100×10⁻⁹ F = 1×10⁻³ s = 1 ms

Step 2 — Vc at t = 1 ms (t = 1τ):

Vc(1 ms) = 5·(1 − e^(−1)) = 5·(1 − 0.3679) = 5 × 0.6321 = 3.16 V

Step 3 — time to reach 4.5 V:

4.5 = 5·(1 − e^(−t/τ))
0.9 = 1 − e^(−t/τ)
e^(−t/τ) = 0.1
−t/τ = ln(0.1) = −2.3026
t = 2.3026·τ = 2.3026 ms ≈ 2.30 ms

Check: At t = 2.30 ms, e^(−2.30) = 0.1003, so Vc = 5·(1 − 0.1003) = 4.498 V ≈ 4.5 V. ✓ Also confirms the rule of thumb: 4.5 V is 90% of 5 V, and reaching 90% takes ln(10) ≈ 2.303τ — consistent with the table's trend between 2τ (86.5%) and 3τ (95%).

Step 4 — current check at t = 0⁺: Immediately after the step, Vc ≈ 0, so all 5 V drops across R: i = 5V/10kΩ = 0.5 mA. At t = 1 ms, Vr = 5 − 3.16 = 1.84 V, so i = 1.84V/10kΩ = 0.184 mA. Independently, i(t) = (Vs/R)·e^(−t/τ) = 0.5 mA × e^(−1) = 0.5 × 0.3679 = 0.184 mA. Both methods agree. ✓

Design Implications

• Debounce and glitch filtering: choose τ several times longer than the expected bounce/glitch duration but short enough not to delay legitimate signal edges beyond timing budget. A mechanical switch bouncing for ~5 ms typically pairs with τ ≈ 1–2 ms (via an added Schmitt-trigger threshold) so noise settles below the switching threshold well before 5τ.
• Power-on reset delay: the RC network on a reset pin must hold the line below the logic-low threshold for longer than the supply's worst-case rise time and the MCU's minimum reset pulse width — size τ using the fraction of the rail needed to cross the threshold, not a full 5τ estimate, since reset thresholds are often well below Vs.
• Low-pass filtering: the same τ sets the −3 dB corner frequency, f₋₃dB = 1/(2πRC) = 1/(2π·τ). A 1 ms τ corresponds to a corner near 159 Hz — useful for knowing whether an RC meant for timing also filters signal content in that band.
• Decoupling and supply sequencing: bulk decoupling capacitors combined with trace/source resistance form unintentional RC delays that can slow down rail sequencing or brown-out response — always check τ against timing specs, not just capacitance value alone.
• Component tolerance stacks: since τ = RC, a 5% resistor and 20% capacitor combine (worst case, additively) to roughly ±25% timing uncertainty — critical when a timing spec has narrow margins.

Key Takeaways

• Every RC charge/discharge transient follows Vc(t) = Vfinal + (Vinitial − Vfinal)·e^(−t/τ) with τ = RC in seconds.
• Charging approaches the final voltage; discharging decays from the initial voltage — both use the identical exponential form, differing only in initial/final conditions.
• τ is the 63.2% point, not the "done" point; use the 5τ rule (≈99.3%) as the practical settling criterion.
• At t=0 a capacitor behaves as a short circuit (for voltage), and at t=∞ (steady state DC) it behaves as an open circuit — this bookends every transient calculation.
• The same τ also sets the RC low-pass filter's −3 dB corner frequency, f₋₃dB = 1/(2πτ), linking transient timing design directly to frequency-domain filtering.
• Always verify a computed transient result against both the voltage and current equations, and against the short/open limiting behavior, before trusting it in a design.