Triac and Diac: AC Power Control

Phase-control dimmers, motor speed controllers, and solid-state relays for AC loads almost universally rely on a triac gated by a diac rather than a pair of discrete SCRs. Understanding how these two devices switch — and why the diac is there at all — is the difference between a dimmer that works over the full rotation of a potentiometer and one that flickers, buzzes, or fails to trigger near the end of its range.

Triac: Structure and Bidirectional Switching

A triac (TRIode AC switch) is functionally two antiparallel SCRs (thyristors) integrated into one five-layer NPNPN structure, sharing a single gate. This lets it conduct current in either direction once triggered, making it suitable for direct AC line switching without a bridge rectifier.

Terminals are labeled MT1 (main terminal 1, reference for gate voltage), MT2 (main terminal 2), and Gate. Like an SCR, a triac has three states:

• Blocking (off): high impedance in both polarities, up to its rated breakover voltage V_DRM/V_RRM.
• Latched on: once triggered, it conducts with a low forward drop (typically 1–1.5 V) regardless of further gate signal — the gate only initiates conduction, it doesn't control current magnitude.
• Commutation (turn-off): conduction stops only when current falls below the holding current I_H, which happens naturally near each AC zero-crossing.

Because it latches, a triac is a two-state (on/off) switch, not a linear amplifier — all power control comes from when in the AC cycle you trigger it, not from modulating gate drive.

The Four Triggering Quadrants

A triac can be triggered with four combinations of MT2-to-MT1 polarity and gate current polarity:

Practical phase-control circuits are usually designed to operate only in QI and QIII (avoiding QIV) because gate sensitivity there can be several times worse, requiring a larger trigger pulse that a simple RC/diac network may not reliably deliver every half-cycle.

Diac: A Bidirectional Trigger Device

A diac (DIode AC switch) is a two-terminal, three-layer (NPN-like but symmetric) device with no gate. It blocks current in both directions until the voltage across it exceeds its breakover voltage V_BO — typically 28–36 V for common parts — at which point it switches into a negative-resistance region and snaps into conduction, dropping to roughly 5–10 V across it as current rises.

Its I–V curve is symmetric about the origin: the same breakover behavior occurs for both polarities, which is exactly what's needed to trigger a triac reliably in both half-cycles of the AC line.

   I
   |         ,--- conducting (post-breakover)
   |        /
   |       /
---+------+------------- V
   |     /|  V_BO
   |    / |
   |   ,  |
(mirror image in third quadrant)

Key point: the diac's snap-action means the gate current pulse delivered to the triac rises quickly (a step, not a slow ramp), giving a clean, consistent trigger edge instead of a marginal slow turn-on that could cause partial conduction and audible buzz in the load.

Worked Example: RC Phase-Control Dimmer

Classic lamp dimmer topology:

AC line ──R(pot)──┬──C── diac ──gate of triac
                   │
                   └── (other side of C to MT1)
Triac MT1–MT2 in series with the load, across the AC line.

Assume: 230 V RMS, 50 Hz line (ω = 2π·50 = 314 rad/s), R adjustable 1 kΩ–100 kΩ, C = 100 nF, diac V_BO = 32 V.

RC time constant: τ = R·C. For R = 50 kΩ (mid-pot):

τ = 50,000 Ω × 100×10⁻⁹ F = 5×10⁻³ s = 5 ms

Compare to the half-cycle period of 10 ms (at 50 Hz, full cycle = 20 ms). A 5 ms τ is a significant fraction of the half-cycle, so the capacitor voltage lags the line voltage substantially — this delays the diac breakover point deep into the half-cycle, cutting conduction angle and dimming the lamp.

Approximate firing angle: the capacitor charges toward the instantaneous line voltage through R with time constant τ. Solving exactly requires the transcendental RC-forced-sine equation, but a design-level approximation: the phase lag introduced by the RC network is

φ ≈ arctan(ω·R·C)

For R = 50 kΩ, C = 100 nF:

ω·R·C = 314 × 50,000 × 100×10⁻⁹ = 314 × 0.005 = 1.57
φ ≈ arctan(1.57) ≈ 57.5°

This phase lag delays when the capacitor reaches V_BO relative to the line zero-crossing, pushing the firing angle later in the half-cycle (less conduction, dimmer lamp) as R increases. At R near its minimum (1 kΩ), ω·R·C = 314 × 1,000 × 100×10⁻⁹ ≈ 0.0314, φ ≈ 1.8° — the capacitor tracks the line almost immediately, firing very early (near full brightness).

Check: the two extremes bound the expected behavior — small R gives early firing (bright), large R gives late firing (dim) — consistent with how a dimmer pot is expected to behave, confirming the RC-lag model direction is correct even though the simple arctan approximation is not an exact solution of the nonlinear charging equation.

Why the Diac Instead of Direct RC-to-Gate Drive

Driving the triac gate directly from the RC network (no diac) is unreliable because:

• Slow-rising gate current near the trigger threshold can cause the triac to turn on gradually rather than snap on, dissipating excess power in the device and causing erratic conduction — visible as flicker or audible buzz in resistive loads.
• Gate sensitivity mismatch between the two triggering quadrants (QI/QIII vs QII) can make the two AC half-cycles fire at different phase angles, producing asymmentric conduction, DC offset in the load current, and even saturation of any transformer in the circuit.

The diac's negative-resistance snap decouples the RC timing (which sets when breakover occurs) from the speed of the resulting gate pulse (which is fast regardless of how slowly the capacitor charged), giving consistent, symmetric triggering across both polarities.

Practical Design Considerations

• Snubber network: an RC snubber (typically 10–100 Ω with 10–100 nF) across MT1–MT2 is standard practice to limit dV/dt during commutation, since a triac driving an inductive load (motor, transformer) can otherwise falsely retrigger from a fast voltage transient after turn-off.
• Minimum/maximum conduction angle limits: practical dimmer designs avoid the extreme ends of the pot range because very small or very large RC time constants push firing angle too close to the zero-crossing or the end of the half-cycle, where triggering becomes unreliable — hysteresis networks (adding a second RC stage) are used to widen the reliable trigger range.
• RFI/EMI: phase-control switching creates a fast current step at each firing point, generating conducted and radiated interference; series line inductors and X/Y capacitors at the input are standard mitigation.
• Zero-crossing vs phase-control: for resistive heating loads without dimming requirements, zero-crossing switching (triggering only at V≈0) minimizes EMI and inrush; triacs used this way are typically driven by an optocoupled zero-cross driver rather than an RC/diac network.
• Thermal derating: triac on-state voltage drop (1–1.5 V) times load current sets conduction losses; a heatsink is required for any load beyond a few hundred mA at line voltage, and junction temperature must be checked against the datasheet's I_T(RMS) rating.

Key Takeaways

• A triac is a bidirectional thyristor (two antiparallel SCRs in one package) that latches on when gate-triggered and turns off naturally near the AC zero-crossing when current drops below I_H.
• Practical designs trigger only in quadrants QI and QIII, avoiding the less-sensitive QIV, to ensure reliable firing with simple gate-drive networks.
• A diac is a symmetric, gateless breakover device that snaps into conduction above V_BO (~28–36 V typical), delivering a fast, consistent trigger pulse to the triac gate regardless of how slowly the RC timing network charged.
• In an RC phase-control dimmer, the pot-and-capacitor time constant sets the firing angle within the AC half-cycle; increasing R increases phase lag (φ ≈ arctan(ωRC)), delaying firing and dimming the load.
• Snubber networks across MT1–MT2 are standard practice to prevent dV/dt-induced false retriggering when driving inductive loads.