Embedded & Firmware
MCU architecture, C programming, peripheral drivers, RTOS, board bring-up, memory/bootloader, and connectivity.
280 topics · 3 with articles
Intern Engineer· 40
- ARM Cortex-M Pipeline Stages (M0 to M55)
- Bit Manipulation: Masking, Setting, Clearing
- Bit-Field Struct for Register Mapping
- C Language Basics: Pointers, Structs, Unions
- C Volatile Keyword for Hardware Registers
- C const and restrict for Optimization Hints
- CMSIS-Core, CMSIS-DSP, CMSIS-NN Libraries
- CPSR / APSR Status Flags: N, Z, C, V
- Cache Architecture: I-Cache and D-Cache
- Cache Coherency and Maintenance Operations
- Cortex-M DSP Extensions: SIMD, SAT Instructions
- Cortex-M FPU Usage (Cortex-M4/M7/M33)
- Cortex-M Security Extension: SAU, IDAU
- Cortex-M55 Helium MVE Vector Instructions
- Data Types and Alignment in Embedded C
- Embedded C++ vs. C for Bare-Metal
- Endianness: Big vs. Little-Endian Byte Order
- Fixed-Point Arithmetic Q-Notation
- Function Pointers and Callback Pattern
- GCC Cross-Compiler Toolchain Setup
- Interrupt Vector Table and Exception Types
- Linker Map File Analysis and Symbols
- Makefile and CMake Build System Basics
- Memory Footprint Optimization
- Memory Map: Flash, SRAM, Peripheral Regions
- Memory Protection Unit (MPU) Region Config
- NVIC: Priority Grouping, Preemption, Sub-Priority
- Power Management: Sleep, Stop, Standby Modes
- Processor Operating Modes: Thread, Handler
- Program Counter, Stack Pointer, Link Register
- RISC-V ISA Basics and Extensions
- RISC-V PMP (Physical Memory Protection)
- Register-Level Peripheral Access via CMSIS
- Stack and Heap Size Configuration
- Static, Inline, and Extern Linkage
- SysTick Timer Configuration
- Thumb-2 Instruction Set Architecture
- TrustZone-M: Secure and Non-Secure World
- Von Neumann vs. Harvard Architecture
- Wake-Up Sources: RTC, EXTI, LPUART
Junior Engineer· 40
- ADC Oversampling and Hardware Averaging
- ADC: Single, Continuous, Scan, Injected, DMA
- CAN Bus Driver Design with Filters and FIFO
- CAN Bus Frame Format: Data, Remote, Error
- CAN FD: Faster Data Rate and Larger Payload
- CORDIC and FMAC Hardware Accelerator
- CRC Hardware Peripheral Usage
- DAC: Single, Dual, DMA and Triangle Mode
- DMA Circular Buffer and Double-Buffering
- DMA Stream Priority and Arbitration
- EXTI External Interrupt Configuration
- Encoder Interface (Quadrature) Timer Mode
- Ethernet MAC + PHY Driver (RMII / MII)
- GPIO: Input, Output, Open-Drain, Alternate Function
- HASH and AES Cryptographic HW Accelerator
- High-Speed ADC Parallel Interface Driver
- I2C Multi-Master Arbitration and Bus Recovery
- I2C: Address Format, ACK/NACK, Clock Stretching
- I2S and PDM Digital Audio Interface Driver
- Input Capture for Frequency Measurement
- JTAG / SWD Debug Interface Protocol
- LIN Bus: Master/Slave and Frame Types
- Low-Power Timer (LPTIM) and Wake-Up
- Modbus RTU Implementation on UART
- PWM Output: Timer Configuration, Resolution
- QSPI / OctoSPI NOR Flash Driver
- RTC: Calendar, Alarm, Tamper Detection
- SDIO / SD Card Driver with FatFS
- SPI DMA Transfer for High-Speed Peripherals
- SPI: CPOL/CPHA Modes, NSS Management
- SpaceWire and MIL-STD-1553 Avionics Protocols
- TRNG (True Random Number Generator) Driver
- UART / USART: Baud Rate, Parity, Stop Bits
- UART Polling vs. Interrupt vs. DMA Mode
- USB CDC / Virtual COM Port Driver
- USB Device Firmware Upgrade (DFU) Class
- USB Full-Speed: Enumeration, Descriptors
- USB HID Class Device Driver
- USB Host: MSC and HID Class Driver
- Watchdog Timers: IWDG and WWDG
Middle Engineer· 80
- ARM CoreSight Architecture Overview
- AUTOSAR Adaptive Platform: SOME/IP, DDS
- AUTOSAR Classic OS: Task, ISR, Alarm
- AUTOSAR Memory Stack: NvM, MemIf, Fee
- Automated Hardware Regression Test Bench
- Bench Power Supply: Current Limiting for Bring-Up
- Binary Semaphore for ISR-to-Task Sync
- Board Bring-Up Checklist: Power, Clock, Flash
- Buildroot: Minimal Root Filesystem
- Bus Fault and Usage Fault Decoding
- Bus Pirate for Quick Protocol Probing
- CAN Bus Termination and Bit Timing Verification
- CPU Load Measurement with DWT Counter
- Character Device Driver (file_ops)
- CoreSight ETM Trace (Instruction Level)
- CoreSight ITM: Stimulus Ports for Printf
- Counting Semaphore and Producer-Consumer
- Current Probe and Differential Probe Usage
- DDR Memory Bring-Up and Training (Embedded Linux)
- DWT: Cycle Counter, Data Watchpoint
- EDF Scheduling for Real-Time Guarantees
- ETH PHY Bring-Up: MDIO, Speed, Duplex
- Embedded Linux Boot Sequence (ROM → U-Boot → Kernel)
- Embedded Linux Device Tree (DTS) Authoring
- Energy Trace and Power Analyzer Usage
- Event Group: xEventGroupSetBits, WaitBits
- FreeRTOS Heap: heap_1 to heap_5 Comparison
- FreeRTOS Task Creation: xTaskCreate, Stack
- GDB Remote Debugging via J-Link GDB Server
- Hard Real-Time Deadline Enforcement
- HardFault Handler Analysis: CFSR, MMFAR, BFAR
- Heap Fragmentation Analysis and Tools
- Hypervisor for Mixed-Criticality (Xen, Jailhouse)
- I2C Stuck Bus Recovery Procedure
- IEC 61508 SIL 1/2 OS Requirements
- Idle Hook and Tick Hook Functions
- In-System Programming (ISP) vs. JTAG
- J-Link / ST-Link Debug Adapter Usage
- J-Trace for Real-Time Instruction Tracing
- JTAG Boundary Scan for PCB Debug
- JTAG Debug Connector: 20-pin ARM Standard
- Linux Kernel Module Writing
- Logic Analyzer: Protocol Decode (UART, SPI, I2C)
- Logic Probe and Digital Pattern Generator
- MPLAB Harmony / STM32CubeMX HAL Analysis
- Memory Map Debug: Reading .map File
- Message Queue: xQueueSend, xQueueReceive
- Multimeter: Continuity, Voltage, Resistance
- Mutex and Priority Inheritance Protocol
- OpenOCD Open-Source On-Chip Debugger
- Oscilloscope: Trigger, Time/Div, Cursor Measurement
- PC-Sampling Profiler for CPU Hotspot Finding
- POSIX API Compatibility Layer on RTOS
- PikeOS Real-Time Hypervisor
- Platform Driver and Device Tree Binding
- Power Profiling: J-Link Energy Measurement
- Priority-Based Preemptive Scheduling
- RTOS Concepts: Task, Scheduler, Context Switch
- Recursive Mutex for Nested Locking
- Round-Robin Scheduling with Time Slice
- SPI Flash Erase-Write-Verify Test
- SWD Debug: Pinout, Speed Optimization
- Saleae Logic Pro: Digital + Analog Capture
- Segger Ozone: Graphical Debugger with SWO
- Segger RTT: Real-Time Printf without UART
- Segger SystemView: Task Timeline Profiling
- Software Timer: xTimerCreate, Start, Stop
- Stack Overflow Detection: Stack Watermark
- Stream Buffer and Message Buffer (FreeRTOS)
- Task States: Running, Ready, Blocked, Suspended
- Thermal Camera for Hot-Spot Detection
- Thread-Local Storage in FreeRTOS
- Tickless Idle and Low-Power RTOS Mode
- Time-Triggered Architecture (AUTOSAR ComStack)
- U-Boot Environment Variables and Boot Script
- UART Console: Smoke Test and Boot Log
- Yocto Project: Layer, Recipe, BB File
- Zephyr Device Tree and Board Config
- Zephyr RTOS Architecture and Kernel Services
- Zephyr Wi-Fi and BLE Stack Integration
Senior Engineer· 40
- A/B Partition Firmware Layout
- Anti-Rollback Counter in NVM (eFuse/OTP)
- Bootloader Anti-Downgrade Protection
- Bootloader CRC / SHA-256 Integrity Check
- Bootloader Design: Jump to App, Address Check
- Compressed Firmware Image (LZ4, zlib)
- Copy Table for Data Initialization
- EEPROM Emulation in Internal Flash (STM32)
- Encrypted Flash Storage (AES-CBC with IV)
- External Flash (W25Q, MX25L) Operations
- FOTA Differential Update (Binary Patch)
- Factory Test Mode and Boot Mode Pins
- FatFS Library Integration and Configuration
- Firmware OTA Update (FOTA) Architecture
- Flash Bad Block Management (NAND)
- Flash Read-While-Write (RWW) Dual-Bank
- Flash Sector Layout for Config and Cal Data
- I2C EEPROM (AT24C) Driver and Wear Leveling
- In-Application Programming (IAP) via UART
- Key Provisioning and Secure Manufacturing
- Linker Script (.ld): .text, .data, .bss, .rodata
- LittleFS: Log-Structured Embedded Filesystem
- MCU Flash Programming via SWD (JFlash)
- MCUboot: Open-Source Bootloader Configuration
- Magic Number and Boot Decision Logic
- Memory Layout for Flash and SRAM Regions
- OTP Fuse Burning Procedure
- Power-Fail Safe Flash Write Strategy
- QSPI NOR Flash XIP Mapping Configuration
- Secondary Bootloader and Chain Loading
- Secure Boot: ECDSA / RSA Signature Chain
- Secure Erase and Factory Reset Implementation
- Startup File: Reset_Handler, SystemInit, Stack
- Trusted Firmware-M (TF-M) BL2 Integration
- U-Boot Bootloader for Embedded Linux
- U-Boot Environment: bootcmd, bootargs
- U-Boot: FIT Image and Verified Boot
- USB DFU Bootloader Implementation
- Wear Leveling in Flash (LittleFS, FAT)
- XIP (Execute-in-Place) from External NOR Flash
Staff Engineer· 40
- 5G Modem Integration (Quectel RG500Q)
- 5G RedCap Module for IoT (Quectel RG200U)
- Amazon FreeRTOS and AWS IoT Shadow
- Azure IoT Hub with MQTT on Embedded
- BLE Advertising: ADV_IND, ADV_SCAN, ADV_NONCONN
- BLE Bluetooth Mesh: Provisioning, Models
- BLE Fundamentals: GATT, GAP, Profiles
- BLE NimBLE Stack on ESP32
- BLE OTA DFU (Nordic, Zephyr)
- BLE Pairing and Bonding (LE Secure Connections)
- Cellular MQTT and HTTP over Cellular Modem
- ChirpStack Private LoRaWAN Server Integration
- CoAP Protocol for Constrained Devices
- ESP-IDF Wi-Fi: Station, AP, Provisioning
- GATT Client and Server Role Implementation
- GNSS Integration: u-blox M10, L96, LC29H
- GNSS NMEA Sentence Parsing
- HTTP/HTTPS Client with mbedTLS on MCU
- Industrial BLE Bluetooth Mesh Implementation
- LTE-M Data Sending with PSM/eDRX
- LoRa SX1276 / SX1262 Driver Design
- LoRaWAN OTAA and ABP Join Procedures
- MQTT with Paho C Embedded Client
- MQTT-SN for Ultra-Constrained Devices
- Matter over Thread / Wi-Fi Implementation
- NB-IoT / LTE-M Module AT Commands
- NFC Forum Tag Type 4 Emulation
- Private LoRaWAN with ChirpStack and TTN
- RTK-GPS for Precision Positioning
- Satellite IoT: Swarm M138, Iridium 9603N
- Thread Network Formation (OpenThread)
- UART Bluetooth Module (HC-05, HM-10)
- UWB (DW3000) Time-of-Flight Implementation
- WPA2/WPA3 Enterprise Authentication on MCU
- Wi-Fi 6 (ESP32-C6) Driver Stack
- Wi-Fi Basics: 802.11 b/g/n/ax Modes
- Wi-Fi Provisioning: BLE-Based, SoftAP, USB
- Zigbee Coordinator + End-Device Pairing
- Zigbee End-Device Firmware with Z-Stack
- lwIP TCP/IP Stack Integration on RTOS
Distinguished Engineer· 40
- AUTOSAR-Compliant Code Guidelines
- Anti-Tamper: Mesh, Voltage Glitch, Temperature
- Buffer Overflow Protection: Guard Bytes
- CERT C Secure Coding Standard Key Rules
- CWE / CVE Embedded Vulnerability Classes
- Code Coverage: Line, Branch, MC/DC
- Code Signing Certificate Lifecycle Management
- Coding Standard Enforcement in CI Pipeline
- Cryptographic Agility Migration Strategy
- Cyclomatic Complexity and Code Metrics
- DO-178C Level A-E Software Assurance
- EU Cyber Resilience Act (CRA) Compliance
- Encrypted OTA Update with Rollback Protection
- FIPS 140-3 Level 1 Cryptographic Module
- FMEA for Software (SFMEA)
- Fault Injection Testing: HW and SW
- Firmware Extraction and RE Defense
- Hardware Security Module Driver (TPM 2.0)
- IEC 61508 SIL 1-4 Software Requirements
- IEC 62304 Medical Software Class A/B/C
- IEC 62443-4-2 Component Security Level
- ISO 26262 ASIL A-D Firmware Lifecycle
- ISO/SAE 21434 Automotive FW Cybersecurity
- Integer Overflow and Underflow Detection
- Integration Testing with Hardware Abstraction
- Key Storage in eFuse / OTP / SE (ATECC608)
- MISRA-C:2012 Rule Categories and Mandatory Rules
- Penetration Testing Embedded JTAG / UART
- Post-Quantum Cryptography on MCU (Kyber)
- Privilege Levels and MPU Region Enforcement
- SBOM (Software Bill of Materials) for FW
- Secure Boot: Signature Verification Chain
- Secure Element Integration (SE050, ATECC608B)
- Side-Channel Countermeasures in Firmware
- Stack Usage Analysis and Stack Canary
- Static Analysis: PC-lint, Polyspace, Klocwork
- TLS 1.3 on MCU: mbedTLS, wolfSSL
- Test-Driven Development (TDD) for Embedded
- TrustZone-M Secure / Non-Secure API Design
- Unit Testing: Unity, Cmocka, Google Test