Standing Waves: Nodes and Antinodes of V and I

What Are Standing Waves on Transmission Lines?

A standing wave is what you get when a forward-traveling wave and its reflection coexist on the same transmission line and interfere with each other. Unlike a traveling wave, which moves energy continuously from source to load, a standing wave's voltage and current envelopes are fixed in space — they oscillate in time at a given point, but the locations of the maxima and minima don't move along the line. For an embedded or RF engineer, the practical consequence is that the impedance you measure looking into a line depends on exactly where along that line you're measuring, which is not something you have to worry about with lumped-element circuits at low frequency.

Forward and reflected wave superposition

Any transmission line driven at one end carries a forward wave V⁺(z)e^(-jβz) traveling toward the load. If the load impedance doesn't match the line's characteristic impedance, part of that wave reflects back toward the source as V⁻(z)e^(+jβz). The total voltage and current at any point z are the phasor sums of these two waves:

V(z) = V⁺e^(-jβz) + V⁻e^(+jβz) I(z) = (V⁺e^(-jβz) − V⁻e^(+jβz)) / Z₀

Z₀ here is the line's characteristic impedance, the ratio of voltage to current for a single traveling wave in isolation. Note the sign difference between the V and I equations — the reflected wave subtracts from current but adds to voltage. That sign flip is the root cause of everything else in this article.

Formation conditions: impedance mismatch and reflection coefficient

A standing wave requires a reflection, and a reflection requires an impedance discontinuity. The load reflection coefficient is

Γ_L = (Z_L − Z₀) / (Z_L + Z₀)

If Z_L = Z₀, Γ_L = 0, there's no reflected wave, and no standing wave forms — only a traveling wave exists, with constant voltage and current magnitude along the line (ignoring loss). Any Z_L ≠ Z₀ — open, short, reactive, or simply a different resistance — produces |Γ_L| > 0 and a standing wave pattern whose depth depends on the magnitude of Γ_L.

Standing vs. traveling waves: key differences

On a traveling wave, |V(z)| and |I(z)| are constant versus position, and the voltage-to-current ratio is Z₀ everywhere. On a standing wave, |V(z)| and |I(z)| vary periodically with position, repeating every half wavelength, and the local V/I ratio — the impedance looking into the line at that point — swings between a minimum and a maximum resistance value rather than staying fixed.

Voltage Nodes and Antinodes

Where voltage nodes occur on the transmission line

A voltage node is a point where the forward and reflected waves interfere destructively, driving |V(z)| to a local minimum. For a purely resistive mismatch (real Z_L), nodes occur at distances from the load given by

d = (nλ/2) for Γ_L real and positive (Z_L > Z₀, node spacing starts at a quarter wavelength offset)

More generally, the node locations shift with the phase of Γ_L. For a short-circuit load, Γ_L = −1 and a voltage node sits exactly at the load; for an open circuit, Γ_L = +1 and a voltage antinode sits at the load instead.

Voltage antinodes: maximum voltage points

Antinodes occur where the two waves add in phase, giving |V(z)|_max = |V⁺|(1 + |Γ_L|). Antinodes and nodes alternate every quarter wavelength, with a full node-to-node or antinode-to-antinode period of λ/2.

Relationship to load impedance and reflection

The distance from the load to the first voltage maximum, l_max, is found directly from the phase angle θ of the reflection coefficient Γ_L = |Γ_L|e^(jθ):

l_max = θλ / (4π), for θ ≥ 0 (add λ/2 if θ is negative, to keep l_max positive)

This is the calculation you need whenever you must place a matching element at a voltage maximum or minimum: measure or compute Z_L, derive Γ_L, extract θ, and convert to a physical length using the line's guided wavelength at your operating frequency.

Mathematical description and phase relationships

Writing Γ(z) = Γ_L e^(-j2βz) for the reflection coefficient at distance z from the load, the voltage magnitude becomes

|V(z)| = |V⁺| · |1 + Γ_L e^(-j2βz)|

This expression makes the periodicity explicit: as z increases, the phase term rotates through 2π every λ/2, so the pattern repeats with that spatial period regardless of operating frequency, provided you express distance in wavelengths.

Current Nodes and Antinodes

Current node locations and physical meaning

Because current is proportional to V⁺e^(-jβz) − V⁻e^(+jβz), it combines the same two waves with a relative minus sign. A current node — a point of minimum |I(z)| — occurs exactly where a voltage antinode occurs, and vice versa.

Current antinodes: maximum current points

At a short-circuit load, for instance, voltage is zero and current is maximum right at the load — a current antinode coincides with the voltage node. Physically, all the incident energy reflects with no power delivered to a resistive load, so the wave interference pattern pushes current to its peak exactly where voltage collapses.

Why current and voltage nodes are 90° apart in space

This is the central asymmetry the whole topic hinges on. The sign flip between the V(z) and I(z) superposition equations means that wherever the forward and reflected voltage waves add constructively, the forward and reflected current waves add destructively, and vice versa. Since the standing wave pattern has spatial period λ/2, and the node/antinode transition happens at the quarter points within that period, voltage and current extrema are offset by λ/4 — a 90° phase shift in terms of βz. This is not a measurement artifact or a convention; it follows directly from Ohm's law applied separately to two counter-propagating waves on the same line.

Practical implications for power flow

Time-averaged power, P = ½Re{V(z)I*(z)}, is constant along a lossless mismatched line (energy isn't created or destroyed in transit) even though V(z) and I(z) individually swing wildly. But in real, lossy lines, conductor and dielectric losses scale with I²R and V²G respectively, so a current antinode produces locally higher conductor heating and a voltage antinode produces locally higher dielectric stress — the standing wave pattern tells you where to expect localized heating or arcing in a high-power system.

Voltage Standing Wave Ratio (VSWR) and Pattern Recognition

VSWR as a quantitative measure of standing wave severity

VSWR condenses the whole pattern into one number:

VSWR = |V|_max / |V|_min = (1 + |Γ_L|) / (1 − |Γ_L|)

A perfectly matched line gives VSWR = 1 (no variation at all). An open or short gives VSWR = ∞.

Relationship between VSWR, node depth, and reflection coefficient

As |Γ_L| rises from 0 toward 1, the denominator (1 − |Γ_L|) shrinks toward zero, so VSWR grows without bound — the voltage node depth approaches zero (true nulls at |Γ_L| = 1) while the antinode keeps rising. This nonlinear relationship is why a VSWR of 2:1 (|Γ_L| ≈ 0.33, about 11% reflected power) is usually tolerable, but 3:1 (|Γ_L| = 0.5, 25% reflected power) often isn't — the curve steepens quickly.

Using VSWR to identify load conditions

A bench measurement of VSWR alone can't distinguish a 25 Ω load from a 100 Ω load on a 50 Ω line — both give the same |Γ_L| magnitude and hence the same VSWR. You need the phase of Γ_L, obtained from a vector measurement, to resolve whether the load is inductive, capacitive, high, or low relative to Z₀.

Connection to impedance mismatch

VSWR is purely a function of |Γ_L|, which is purely a function of the Z_L-to-Z₀ ratio and phase angle. There's no VSWR without a Z₀ reference, which is why characteristic impedance has to be nailed down — in both the line design and the measurement calibration — before VSWR numbers mean anything.

Practical Effects: Impedance Variation Along the Line

How input impedance changes between nodes and antinodes

The impedance looking into a lossless line of length l terminated in Z_L is

Z_in(l) = Z₀ (Z_L + jZ₀tan(βl)) / (Z₀ + jZ_L tan(βl))

At a voltage maximum (current minimum), Z_in is purely resistive and equal to Z₀ · VSWR — its highest resistive value. At a voltage minimum (current maximum), Z_in is also purely resistive but equal to Z₀ / VSWR — its lowest resistive value. Between these points, Z_in is complex, swinging through reactive values as you move along the line. This is the practical answer to "why does my amplifier see a different load than my VNA shows at the connector": the two are separated by a length of cable, and that cable transforms impedance continuously according to this formula.

Quarter-wave and half-wave line transformations

A quarter-wave line turns a node into an antinode: Z_in = Z₀² / Z_L. This is the basis of quarter-wave matching transformers. A half-wave line reproduces the load impedance unchanged at its input (Z_in = Z_L), which is useful for routing a known impedance through a longer physical distance without disturbing the match — but only at the design frequency.

Real-world consequences: power loss, heating, and efficiency

Beyond the obvious reflected-power loss at the source, standing waves concentrate stress at specific physical locations. Connectors or trace discontinuities sitting near a voltage antinode see elevated peak voltage and are more prone to dielectric breakdown or corona in high-power transmitters. Conductors near a current antinode run hotter due to I²R losses, which matters for trace width and thermal design in power amplifier output networks. A mismatched amplifier can also see its load impedance swing into a region that drives it into compression, oscillation, or reduced gain depending on where the antenna connector sits relative to a node.

Frequency dependence of node positions

Node and antinode locations are specified in wavelengths, not fixed physical distances, so they move as frequency changes. A matching network or quarter-wave section cut for 2.4 GHz lands its transformation points at different physical offsets at 2.5 GHz, which is why standing-wave-based matching techniques are inherently narrowband unless deliberately broadened with multi-section designs.

Measurement and Characterization

Observing standing wave patterns with network analyzers

Historically, standing wave patterns were measured with a slotted line and a sliding probe that physically found the V_max and V_min points. Modern practice uses a vector network analyzer to measure S11 directly at the reference plane, from which Γ_L, VSWR, and the full Z_in(l) profile can be computed without ever building a slotted line.

S-parameter interpretation for discontinuities

S11 magnitude and phase at the reference plane give you |Γ_L| and θ directly, so VSWR and l_max fall out of the same measurement. A Smith chart plot of S11 versus frequency shows loops or arcs whose distance from the center indicates mismatch severity, and whose rotation direction with frequency tells you whether the discontinuity is closer to looking inductive or capacitive.

Time-domain reflectometry (TDR) perspective

Where S-parameters give you frequency-domain reflection data, TDR (or a VNA's time-domain transform) converts that into a reflection-versus-distance trace, directly showing where along a physical line or board trace a discontinuity sits — useful for locating a bad via, connector, or stub without guessing from frequency-domain ripple alone.

Identifying node locations from measurement data

Regardless of method, before any of these numbers are trustworthy, the measurement reference plane needs to be established through proper calibration — see VNA calibration methods for the SOLT, TRL, SOLR, and LRM approaches — since residual directivity and cable loss errors otherwise masquerade as mismatch that isn't really there. Once calibrated, periodic ripple in S11 phase versus frequency, or repeated peaks in a TDR trace, mark the node spacing directly, and the two-port behavior of any intervening network can be cross-checked against its Z, Y, H, or ABCD parameter model to confirm the mismatch is where you think it is rather than hiding in an adapter or connector.

Mitigation: Matching Networks and Termination

Impedance matching to suppress standing waves

The direct fix is to present Z_L = Z₀* (its complex conjugate, or simply Z₀ for a real target) at the load reference plane, using an L-network, stub, or quarter-wave transformer sized from the measured Γ_L. Once |Γ_L| → 0, the standing wave pattern collapses to a traveling wave and Z_in becomes constant along the line.

Proper load termination strategies

In digital and mixed-signal boards, this shows up as series or parallel termination resistors sized to the trace's characteristic impedance; in RF systems, it's attenuators, isolators, or active matching networks that prevent an antenna or mixer port from reflecting significant energy back into the line.

Design trade-offs in high-frequency systems

Perfect matching across a wide bandwidth usually costs insertion loss, component count, or design complexity, so most systems accept a nonzero VSWR bound (commonly under 1.5:1 or 2:1 depending on the application) rather than chasing VSWR = 1 everywhere, trading a small amount of standing-wave-induced impedance variation for simpler, cheaper, and more broadband matching.