Analog ElectronicsInternubiquitous

Signal Integrity: Reflection, Crosstalk, Termination

Learn the reflection coefficient, NEXT/FEXT crosstalk mechanisms, and series vs. parallel termination with worked signal integrity examples.

6 min readAhmet Zahid ArıcanUpdated 11 Sept 2026
Contents & prerequisites

At board-level clock speeds above roughly 50–100 MHz, or with edge rates under a nanosecond, a trace stops behaving like an ideal wire and starts behaving like a transmission line. If the interconnect isn't treated that way — with proper characteristic impedance and termination — signals reflect off impedance mismatches, ring, overshoot, and couple into neighboring traces. These effects cause bit errors, EMI failures, and timing violations that no amount of logic-level debugging will explain. Signal integrity (SI) is the discipline of keeping the waveform clean enough, at the receiver, to be sampled correctly.

When a Trace Becomes a Transmission Line

A trace must be analyzed as a transmission line — not a lumped node — when its electrical length is a significant fraction of the signal's rise time. The rule of thumb:

t_r ≤ 6 · t_pd · length   →   treat as transmission line

where t_pd is the propagation delay per unit length (typically ~150 ps/inch on FR4 stripline, ~140–180 ps/inch microstrip) and t_r is the signal's 10–90% rise time.

A common practical threshold: if the one-way trace delay exceeds ~1/6 of the rise time, reflections matter. Example: a 1 ns rise time signal has a critical length around 1 ns / 6 / 150 ps/in ≈ 1.1 inches. Any net longer than that on a fast bus needs impedance control.

Reflections: Why Mismatches Bounce Signals Back

A transmission line has a characteristic impedance Z0 (typically 50 Ω single-ended, 90–100 Ω differential). When a wave traveling down the line meets a discontinuity — a connector, via, unterminated end, or a load whose impedance differs from Z0 — part of the energy reflects back toward the source.

The reflection coefficient at a load ZL:

Γ = (ZL − Z0) / (ZL + Z0)
  • ZL = Z0 → Γ = 0, no reflection (matched)
  • ZL = ∞ (open) → Γ = +1, full reflection, same polarity
  • ZL = 0 (short) → Γ = −1, full reflection, inverted
  • ZL = 0 at the source end with a driver of output impedance ZS, the same formula applies with ZS in place of ZL.

Worked example: A 50 Ω trace drives a high-impedance CMOS input (ZL ≈ 10 kΩ, effectively open). Γ_load = (10000−50)/(10000+50) ≈ +0.99 — almost a full in-phase reflection. If the driver's output impedance is 10 Ω (low-impedance push driver), the reflected wave sees Γ_source = (10−50)/(10+50) = −0.67 at the source, bouncing part of the energy back toward the load again. The result is visible ringing: the incident step, a near-full-amplitude reflected step arriving back at the load after 2·t_pd·length, and a decaying series of re-reflections until the line settles to VDD. Each round trip adds 2·t_pd·length of delay before the waveform is "quiet" enough to sample reliably — this directly eats into setup/hold margin at high speed.

Reflections also occur at any impedance step (e.g., a via transitioning from a 50 Ω trace to a component footprint with different local impedance), not just at the ends of a line.

Termination Strategies

MethodPlacementMechanismTradeoff
Series (source) terminationAt driver, Rs = Z0 − Zdriver_outAbsorbs the reflection coming back from the load on its second passOnly one edge reaches full swing before the reflection returns; not ideal for multi-drop buses
Parallel (end) terminationAt receiver, RT = Z0 to a rail or VTTAbsorbs incident wave at the load, no reflection generated thereContinuous DC current draw through RT, extra power
AC (RC) terminationAt receiver, R = Z0 in series with C to groundMatches impedance only during transitionsNo static power, but C must be sized (τ = RC small vs. bit time)
Differential terminationAcross a differential pair, RT ≈ ZdiffMatches differential impedance (~100 Ω typical)Requires tight coupling and matched trace lengths

Design check for series termination: if a driver has 25 Ω output impedance driving a 50 Ω line, add Rs = 50 − 25 = 25 Ω in series. Verify: total source-side impedance = 25 + 25 = 50 Ω = Z0, so Γ_source = 0 — the reflection returning from an open load is absorbed on arrival at the source and does not re-launch a second wave.

Crosstalk: Coupling Between Adjacent Traces

Crosstalk arises from mutual capacitance (Cm) and mutual inductance (Lm) between neighboring traces. It splits into two components measured at the near and far end of a "victim" trace next to an "aggressor":

  • Near-end crosstalk (NEXT): appears at the driven end of the victim, roughly proportional to Cm and Lm together; saturates to a fixed level for long enough coupled lengths (backward-traveling wave).
  • Far-end crosstalk (FEXT): appears at the far end, grows with coupled length, and its polarity depends on whether capacitive or inductive coupling dominates. In a homogeneous dielectric (stripline), the two nearly cancel; in microstrip (inhomogeneous, field partly in air), inductive coupling dominates and FEXT does not cancel — it adds a derivative-shaped glitch proportional to dV/dt of the aggressor.

Practical mitigation:

  • Spacing: crosstalk falls off roughly with the square of increasing edge-to-edge spacing; the "3W rule" (spacing ≥ 3× trace width) is a common starting point for a 50 Ω microstrip.
  • Guard traces/ground pours: a grounded trace or via-stitched ground plane between aggressor and victim intercepts coupled field lines.
  • Reducing coupled length: route parallel runs as short as possible; break up long parallel sections with jogs.
  • Differential routing: tightly coupled differential pairs are far less sensitive to external aggressors because common-mode coupling cancels at the receiver.

Worked Example: Choosing Termination for a 50 Ω Bus

A driver with 20 Ω output impedance drives a 50 Ω trace 6 inches long (t_pd ≈ 150 ps/in → one-way delay = 900 ps) to a high-impedance receiver, edge rate 500 ps. Since one-way delay (900 ps) exceeds 500 ps/6 ≈ 83 ps, this must be treated as a transmission line.

Options:

  1. Series termination: Rs = 50 − 20 = 30 Ω at the driver. Check: source impedance 20+30=50Ω matches Z0, Γ_source=0. The receiver still sees Γ_load≈+1 (open), so the far end swings to full amplitude on the first incident wave and stays there — correct for a single receiver.
  2. Parallel termination: RT = 50 Ω at the receiver to VTT = VDD/2. Eliminates the load reflection entirely (Γ_load=0), but adds a static current of VDD/(2·50Ω) continuously — for a 3.3 V bus, that's 33 mA per line, often unacceptable for many parallel bus lines.

For a single point-to-point link, series termination is the lower-power choice and is verified above to fully absorb the reflection after one round trip.

Key Takeaways

  • Treat a trace as a transmission line once its one-way delay is a meaningful fraction of the signal rise time (rule of thumb: one-way delay > t_r/6).
  • Reflections are governed by Γ = (Z − Z0)/(Z + Z0); mismatches at either end cause ringing that costs timing margin.
  • Series termination absorbs reflections at the source (low static power, best for point-to-point); parallel termination absorbs at the load (better for multi-drop but burns continuous current).
  • Crosstalk (NEXT/FEXT) comes from mutual C and L between traces; spacing (3W rule), guard traces, and shorter parallel runs are the primary mitigations.
  • Differential pairs resist crosstalk better than single-ended lines due to common-mode cancellation, but require matched length and tight, consistent coupling.

Learning

Sign in to track your progress.

Evidence

Public projects engineers linked to Signal Integrity: Reflection, Crosstalk, Termination.

Add evidence

No engineer has linked a project to this topic yet. Built something that proves it? Add the project and tag it with analog-electronics-signal-integrity-reflection-crosstalk-termination — it then shows here and on your public profile.