Analog ElectronicsJuniorcommon

BJT Operating Regions: Active, Saturation, Cutoff, Breakdown

Learn how BJT junction bias states define active, saturation, cutoff and breakdown regions, with a worked bias-point calculation and design rules.

7 min readAhmet Zahid ArıcanUpdated 11 Sept 2026
Contents & prerequisites

A BJT is not one linear device — it's four distinct devices depending on the bias state of its two junctions. Whether a transistor acts as a linear amplifier, a closed switch, an open switch, or a smoking hazard is decided entirely by which of these four regions it sits in. Misreading this — for example letting a "current source" collector load pull the device into saturation — is one of the most common reasons a hand-calculated amplifier gain never shows up on the bench.

The Two-Junction Picture

A BJT has two p-n junctions: base-emitter (BE) and base-collector (BC). Each can independently be forward (F) or reverse (R) biased, giving four combinations that define the four operating regions:

RegionBE junctionBC junctionBehavior
Active (forward-active)ForwardReverseLinear amplification, IC controlled by IB
SaturationForwardForwardBoth junctions conducting, VCE pinned low
CutoffReverseReverseNo conduction, both junctions off
BreakdownReverse (avalanche)Reverse (avalanche)BC or BE junction exceeds rated reverse voltage

Everything else — β, VCE(sat), the shape of the output characteristic curves — follows from which of these four states the junctions are in.

Active Region: The Amplifier State

Bias condition: VBE ≈ 0.6–0.7 V (forward), VBC reverse biased (for NPN, VC > VB).

In active mode the collector current is controlled by the base-emitter voltage through the Shockley-like exponential relation, and to a first approximation by the base current through β (hFE):

IC = β·IB
IC ≈ IS·exp(VBE/VT)      (VT ≈ 26 mV at 300 K)
IE = IC + IB

The reverse-biased BC junction means the depletion region there is wide, and the collector simply collects the carriers injected by the emitter and diffusing across the (thin) base — collector voltage has only a second-order effect on IC (the Early effect, ro = VA/IC). This is why the output characteristics (IC vs. VCE at fixed IB) are nearly flat lines in active mode: IC depends on IB, not much on VCE.

Design implication: every small-signal amplifier stage must be biased into active region with margin — typically VCE held well above VCE(sat) (a common rule of thumb: VCE > 1 V for silicon small-signal BJTs) across the full signal swing, or the negative half-cycle clips into saturation.

Saturation: Both Junctions Forward Biased

Bias condition: VBE forward (~0.7 V), and the collector voltage drops low enough that VBC also becomes forward biased (VC < VB by a few tenths of a volt for NPN).

Once both junctions conduct, the transistor loses its current-source behavior. Excess base current can no longer proportionally increase IC — the device is "flooded," and VCE collapses to a small residual value:

VCE(sat) ≈ 0.1–0.3 V   (typical silicon small-signal BJT)
IC(sat) ≈ (VCC − VCE(sat)) / RC     (set entirely by the external circuit)

Here β·IB > IC(sat) — the base current supplied is more than the collector can actually carry, a condition often described as overdrive (the ratio IB(supplied)/IB(needed for edge of saturation) is the overdrive factor).

Where it's used deliberately: switching applications (logic-level drivers, relay drivers, power switches) want saturation for the "on" state precisely because VCE(sat) is low, minimizing conduction loss (P = IC·VCE(sat)). Design rule of thumb: choose IB ≥ IC/βforced with βforced well below the datasheet minimum hFE (commonly 10 for hard saturation) to guarantee saturation across process, temperature, and load variation.

Where it's a problem: in a linear amplifier, saturation is a fault mode — it means the collector resistor or supply headroom is too small for the DC operating point plus signal swing, and the output clips flat near VCE(sat) instead of tracking the input.

Cutoff: Both Junctions Reverse Biased (Off)

Bias condition: VBE < the forward-conduction threshold (roughly < 0.5–0.6 V for silicon, or even reverse), and BC also reverse biased.

With BE junction not conducting, there's no injected carrier flow into the base, so ideally IC = IB = 0. In practice a small leakage current ICEO flows (collector-emitter leakage with base open), driven by minority-carrier thermal generation across the reverse-biased junctions — typically nanoamps for silicon at room temperature, but it roughly doubles every 10 °C, which matters in high-temperature designs (automotive, industrial).

Design implication: cutoff is the "off" state for a switch — VCE rises to VCC (limited by the load), IC ≈ 0. For clean switching, the base drive should actively reverse-bias or at least fully de-bias BE (VBE ≤ 0 or below threshold), not just float it, especially at high temperature or high speed where stored base charge (from prior saturation) must be swept out before cutoff is reached — this delay is the storage time ts in switching-speed specs.

Breakdown: Exceeding Junction Ratings

Breakdown is not a normal operating state — it's the boundary where a reverse-biased junction fails to hold off voltage. Two mechanisms and two relevant ratings:

  • BVCEO (collector-emitter breakdown, base open): the BC junction avalanches with the base floating; lower than BVCBO because base current from avalanche multiplication effectively adds base drive, triggering earlier breakdown (a second-breakdown-adjacent effect via the transistor's own β).
  • BVCBO (collector-base breakdown, emitter open): pure avalanche breakdown of the reverse-biased BC junction alone — the highest of the voltage ratings.
  • BVEBO (emitter-base breakdown): the BE junction is a much lower-voltage junction (heavily doped, narrow depletion region) — often only 5–8 V. Reverse-biasing BE beyond this (common mistake: using a BJT as a cheap ~6 V zener) degrades β permanently due to hot-carrier damage even if the device survives electrically.
Typical ordering:  BVCBO > BVCEO > BVEBO

Design implication: breakdown ratings set the absolute voltage design envelope — collector supply plus any inductive kickback (relay/motor driver flyback) must stay below BVCEO with margin, and reverse base-emitter transients (common in H-bridge and totem-pole stages during switching) must stay below BVEBO.

Worked Example: Checking a Bias Point

NPN BJT, β = 150, VCC = 12 V, RC = 2 kΩ, RB = 560 kΩ, VBE(on) = 0.7 V, base driven from VCC through RB (simple fixed bias).

Step 1 — base current:

IB = (VCC − VBE) / RB = (12 − 0.7) / 560k = 20.2 µA

Step 2 — assume active region, compute IC:

IC = β·IB = 150 × 20.2 µA = 3.03 mA

Step 3 — compute VCE:

VCE = VCC − IC·RC = 12 − (3.03 mA × 2 kΩ) = 12 − 6.06 = 5.94 V

Step 4 — verify the active-region assumption: VCE = 5.94 V is well above VCE(sat) (~0.2 V) and above VBE, so BC junction is indeed reverse biased (VC = 5.94 V > VB = 0.7 V). Assumption holds — the transistor sits in active region with healthy headroom for signal swing in either direction.

Contrast — same circuit with RC = 4 kΩ: IC would (if still active) be 150 × 20.2 µA = 3.03 mA, giving IC·RC = 12.1 V > VCC — impossible. This signals saturation: solve instead with VCE = VCE(sat) ≈ 0.2 V, giving IC(sat) = (12 − 0.2)/4k = 2.95 mA, and check β·IB = 3.03 mA > IC(sat) confirms overdrive into saturation, consistent with the contradiction found assuming active mode.

Key Takeaways

  • The four BJT regions are defined entirely by the bias state of the BE and BC junctions: active (F/R), saturation (F/F), cutoff (R/R), breakdown (junction reverse rating exceeded).
  • Active region gives IC ≈ β·IB with IC largely independent of VCE (aside from Early effect) — the basis for linear amplification.
  • Saturation pins VCE near VCE(sat) (0.1–0.3 V typical) once β·IB exceeds what the collector circuit can pass — desirable for low-loss switching, a fault condition in amplifiers.
  • Cutoff gives near-zero IC with only small leakage (ICEO); stored base charge from prior saturation delays turn-off (storage time).
  • Breakdown ratings (BVCEO, BVCBO, BVEBO, ordered BVCBO > BVCEO > BVEBO) define the hard voltage limits of safe operation — BVEBO is often surprisingly low and easy to violate in switching topologies.
  • Always verify an assumed operating region by checking that the resulting junction voltages are self-consistent — an "active region" calculation that predicts VCE below VCE(sat) means the transistor is actually saturated.

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