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X-Ray Inspection: BGA and QFN Void Analysis

Set BGA and QFN X-ray void acceptance limits, tune AXI sensitivity, and link void area percentage to thermal fatigue and shear strength data.

13 min readAhmet Zahid ArıcanUpdated 30 Oct 2026
X-Ray Void Analysis in BGA and QFN Solder Joints
Contents & prerequisites

Why voids in BGA and QFN solder joints matter for reliability

Voids are gas pockets trapped in a solder joint during reflow that reduce the effective metal cross-section carrying both current and mechanical load. In a BGA (ball grid array) joint or the thermal pad of a QFN (quad flat no-lead) package, a void doesn't just sit there inertly — it changes how stress travels through the joint during thermal cycling, and above certain size and location thresholds it measurably shortens fatigue life.

How voids trap stress and initiate thermal fatigue

A void acts as a stress concentrator because the solder around its edge has to carry the same total load through a smaller area. Under thermal cycling, the CTE (coefficient of thermal expansion) mismatch between the package, the solder, and the PCB laminate generates cyclic shear strain at the joint interface. A crack almost always starts at the highest local strain point, and voids near the joint periphery — particularly near the package-side or board-side intermetallic layer — hand that crack a head start by removing material exactly where strain is already concentrated. A void in the geometric center of a ball, by contrast, is mechanically far less dangerous because the center of a BGA ball sees comparatively low shear strain. This is why void area percentage alone is an incomplete metric: a 20% void sitting at the neutral axis of the joint can be more benign than an 8% void sitting at the corner ball nearest the package edge, where thermal cycling shear strain peaks.

Void size thresholds and industry acceptance criteria

Most acceptance schemes express void size as a percentage of the ball's footprint area in a single X-ray projection, not as a volume fraction. IPC-7095 (the IPC standard for BGA design and assembly process implementation) and IPC-A-610 (Acceptability of Electronic Assemblies) are the two documents engineers actually pull numbers from, and they distinguish classes of product rather than giving one universal number — look up the current revision for the exact percentage by class, because these thresholds have shifted between revisions. As a rule of thumb used across the industry, voids under roughly 10% of ball area are rarely actionable, voids in the 10–25% range trigger engineering review depending on joint location, and voids above 25–30% are flagged for rejection on most Class 2/3 (IPC's general industrial / high-reliability) programs. QFN thermal pad voiding is scored differently because the thermal pad's job is heat extraction, not just electrical continuity, so some QFN specs separate a "max single void" limit from a "total void area" limit to catch one large bubble blocking thermal transfer even when the cumulative percentage looks acceptable.

Risk of infant mortality and field failures

Large voids near a joint's outer edge can cause early-life failure even before thermal cycling begins, because they reduce the as-reflowed joint strength enough to fail under first-power-on thermal shock or shipping vibration. This is the "infant mortality" case: a joint that looks fine on a continuity test at end-of-line but develops a crack during the first few thermal transients the board sees in the field. Distinguishing infant-mortality risk from long-term fatigue risk matters because the void size and location signatures differ — infant mortality correlates with single large voids at the joint edge, while fatigue life reduction correlates more with cumulative void area distributed across the joint array.

How X-ray imaging detects voids in dense component packages

X-ray imaging reveals internal joint structure by measuring differential attenuation through solder, substrate, and gas, which optical and even most mechanical inspection methods cannot do for a hidden joint. This is the only practical non-destructive option once a package covers its own solder joints.

Why optical inspection fails for BGAs and QFNs

AOI (automated optical inspection) only sees what reflects visible light back to a camera, and a BGA ball or QFN thermal pad is physically hidden under the package body after placement. AOI can catch a tombstoned part, a bridged QFP lead, or a missing component, but it has zero visibility into a joint it cannot see — which is every joint under a BGA and the thermal pad under a QFN. This is the same visibility gap that makes Bare Board Incoming Inspection per IPC-A-600 necessary before assembly even starts: once a package is reflowed in place, direct visual access to the joint is gone for good.

Penetration and contrast advantages of X-ray over AOI

X-ray attenuation depends on material density and thickness, so solder (lead-free SAC alloys run roughly 7.3–8.4 g/cm³ depending on composition) attenuates strongly while a gas void attenuates almost nothing, producing high contrast on the detector. This contrast is what makes void percentage measurable by simple image thresholding rather than requiring exotic reconstruction for most BGA work.

Shadow imaging vs. tomographic reconstruction for void location

2D shadow (transmission) X-ray projects the entire joint stack onto a single image, which is fast and adequate for measuring void area percentage but cannot tell you whether a void sits near the top, middle, or bottom of the ball. 3D CT (computed tomography, built from many angled projections) reconstructs a volumetric model and resolves void depth and position within the joint, at the cost of scan time measured in minutes per board instead of seconds. Production AXI (automated X-ray inspection) lines use 2D projection for 100% inline screening and reserve CT for failure analysis, engineering characterization, or first-article qualification where joint-by-joint depth information is worth the throughput hit.

Interpreting void morphology: isolated bubbles vs. interconnected pathways

Void shape tells you about its origin, and origin tells you whether the fix is a reflow profile change or a materials change. A single round void and a chain of elongated voids can produce the same area percentage reading but come from completely different root causes.

Spherical voids from trapped flux and outgassing

Round, isolated voids form when flux solvent or entrapped air can't escape the molten solder before it solidifies, usually from insufficient time above liquidus or flux chemistry that outgasses late in the reflow profile. These tend to be randomly distributed across the joint array rather than clustered at one location, which is itself a diagnostic clue pointing at the paste or profile rather than the package.

Dendritic and chain-like voids from reflow dynamics

Elongated, branching, or chain-like voids usually indicate solder solidifying asymmetrically — one region of the joint freezing before gas trapped elsewhere can migrate out and escape through the still-molten remainder. This pattern shows up more often under large QFN thermal pads, where the pad's large flat area and the package's thermal mass create uneven cooling across the joint.

How void distribution patterns predict failure modes

A random scatter of small voids across many balls points to a paste/profile issue and tends to produce fleet-wide fatigue life reduction. A cluster of large voids at the corner balls — the highest-strain location in a BGA array — points to localized process variation (stencil aperture, pad finish) and tends to produce a smaller number of early, severe failures rather than a gradual life reduction. When X-ray findings are ambiguous about which mechanism is at play, cross-sectioning or a Dye-and-Pry Test: BGA Crack Visualization on a sample unit confirms whether existing voids are already propagating cracks.

Setting acceptance limits and grading schemes for void area percentage

Acceptance limits should be set per product class and per joint location, not as one blanket percentage applied to every ball on every board. Treating a corner ball and a center ball identically wastes inspection capability that X-ray can actually give you.

IPC-J-STD-001 and IEC-61191 void criteria for different applications

J-STD-001 (Joint Industry Standard for soldered electrical and electronic assemblies) sets workmanship requirements by class, and IEC-61191 is the equivalent international assembly standard; both defer specific BGA void numeric limits to companion documents like IPC-7095, so don't expect a single table in the base standard — check the current revision of the referenced BGA-specific document for the number your contract calls out.

Per-joint vs. per-component acceptance strategies

StrategyWhat it measuresStrengthWeakness
Per-joint max void %Worst single ball on the partCatches localized defectsCan reject good parts over one outlier ball
Per-component average void %Mean across all ballsReflects overall process healthHides one severely voided corner ball
Location-weighted limitDifferent thresholds for corner/edge vs. center ballsMatches real strain distributionRequires mapping ball position in AXI software

Location-weighted limits give the best correlation to field reliability but require more setup effort in the AXI program, since the system has to know which balls are corner/edge versus field balls for a given package footprint.

Military, automotive, and commercial grade thresholds

Automotive (AEC-Q100-qualified assemblies, often built to J-STD-001 Class 3) and military/aerospace programs typically hold tighter void limits and often add a corner-ball-specific maximum on top of the overall percentage, because both field environments combine wide temperature swings with long service life. Commercial/consumer products built to Class 2 generally tolerate higher void percentages because service life expectations and thermal cycling severity are both lower. The number to put in a work instruction should come from the governing standard revision plus any customer-specific deviation, not from a vendor's default AXI software setting — AXI vendors ship a reasonable starting threshold, not a qualified limit for your product.

Workflow: programming AXI systems to flag and classify voids

AXI void detection works by segmenting each ball or pad image into solder versus void regions by gray-level threshold, then computing area percentage against programmed limits per joint position. Getting this right without drowning the line in false calls takes more tuning than the out-of-box configuration provides.

Image segmentation and algorithm sensitivity tuning

A typical setup: define a region of interest around each ball location using the package's pad pitch from the CAD file, apply a gray-level threshold to separate void (brighter, less attenuating) from solder (darker), then sum thresholded pixel area and divide by the ball's total projected area. Example logic for a per-ball check:

for each ball in package.ball_map:
    roi = extract_region(image, ball.x, ball.y, ball.radius)
    void_pixels = threshold(roi, gray_level > void_threshold)
    void_pct = area(void_pixels) / area(roi) * 100
    limit = location_limit[ball.position]  # corner/edge/center
    if void_pct > limit:
        flag_joint(ball.id, void_pct, limit)

The threshold value itself needs calibration against known-good and known-bad reference boards for the specific solder alloy and ball size in use, since gray-level response shifts with X-ray tube settings, alloy density, and detector age.

False positives from solder roughness and shadowing artifacts

Surface roughness on the solder ball, adjacent copper features, or via-in-pad structures can attenuate X-rays unevenly and get misread as void area, especially in 2D projection where overlapping features from different board layers stack into one image. Tuning the region-of-interest boundary tightly around each ball — rather than a loose box that captures neighboring traces or vias — removes most of this. Running a controlled set of known-good boards through the program after every threshold change catches false-call drift before it reaches the line, and the same discipline used for incoming board inspection applies here: don't trust a setting until it's been validated against a reference standard, not just a vendor default.

Documentation and traceability for high-reliability builds

Every AXI program used on a Class 3 or automotive build should be version-controlled with the threshold values, ROI definitions, and reference board images archived alongside the program file, because an auditor or failure-analysis engineer will eventually need to reproduce exactly what the machine measured on a specific date. Lot traceability tying AXI pass/fail records to specific solder paste lots and reflow profile logs turns a single flagged board into a process signal instead of an isolated data point.

Root causes of void formation during reflow and rework

Most voiding traces back to one of four controllable factors: thermal profile, moisture, paste chemistry, or atmosphere. Fixing voiding almost always means changing one of these rather than adding more inspection.

Insufficient dwell time and peak temperature undershoots

Not enough time above liquidus prevents trapped gas from coalescing and escaping before the solder solidifies, leaving it frozen in place as a void. Reflow profiles that undershoot peak temperature or rush through the liquidus window to protect temperature-sensitive components often trade one risk (component thermal stress) for another (voiding) — profile optimization has to balance both against the limits in J-STD-020 for the specific component moisture sensitivity level in use.

Moisture in component packages and board laminates

Moisture absorbed into a BGA package body or the PCB laminate itself vaporizes during reflow and is a major source of large, often catastrophic voids and even package delamination ("popcorning"). Following J-STD-020 floor life and bake-out requirements for moisture-sensitive components, and baking boards that have exceeded their out-of-bag floor life, removes this source before it ever reaches the oven.

Solder paste composition and stencil squeegee speed effects

Paste flux chemistry, metal load, and particle size distribution all affect how readily entrapped gas escapes during reflow, and squeegee speed during stencil printing affects how much air gets folded into the paste deposit in the first place. Faster squeegee speeds tend to entrain more air; slower speeds with correctly specified squeegee pressure generally reduce void-forming gas pockets at the cost of print cycle time.

Nitrogen reflow and vacuum solder pots as mitigation

Reflowing under nitrogen atmosphere reduces oxidation of the paste surface, which lets flux volatiles escape more completely before solidification and measurably lowers void percentage compared to air reflow for the same profile. Vacuum reflow — pulling a brief vacuum stage after peak reflow while the solder is still molten — pulls residual gas out of the joint directly and is the most effective single process lever for large QFN thermal pads or BGA voiding, though it requires equipment most standard reflow ovens don't have.

Correlating X-ray void data to reliability test results

X-ray void percentage is a leading indicator, not a reliability result by itself — it has to be correlated against destructive and environmental test data before a numeric limit means anything for a specific product. Setting a threshold without this correlation step just copies someone else's product's risk tolerance onto yours.

Linking void size to ball shear strength scatter

Ball shear strength data (measured per Ball Shear Test (JESD22-B117) for BGA Quality) typically shows increasing scatter and a downward shift in mean shear force as void percentage rises past the 20–30% range, though the exact relationship is alloy- and package-specific and should be established empirically on a given build rather than assumed from a generic curve. Running shear tests on boards with known X-ray void percentages — spanning low, medium, and high values from production — builds a correlation specific to the paste, profile, and package actually in use.

When X-ray void rejection prevents thermal cycle failures

The payoff case for AXI void screening is catching the boards that would have failed thermal cycling or drop testing in qualification, before they're built into a product. Comparing AXI reject rates against thermal cycle test failure rates on the same lot, over several production runs, is how an engineering team confirms the void threshold in use is actually doing its job rather than just generating paperwork.

Cost-benefit of 100% X-ray inspection vs. statistical sampling

100% inline X-ray inspection catches every outlier joint but adds cycle time and capital cost to every board; statistical sampling (checking a fixed percentage of boards per lot) is cheaper per unit but will miss an isolated bad joint on an unsampled board. The right choice depends on failure consequence: automotive and medical builds generally justify 100% inspection given field failure cost, while low-criticality consumer products often run statistical sampling with periodic reference-board requalification instead, reserving full inspection for new product introduction and process changes.

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