Body Diode Reverse Recovery: Qrr, trr and Losses

What Is Body Diode Reverse Recovery?

Body diode reverse recovery is the delay and transient current that occurs when a conducting PN junction inside a MOSFET or IGBT is forced to switch off and block voltage in the reverse direction. The device doesn't stop conducting instantly; it keeps conducting backward for tens to hundreds of nanoseconds while stored minority carriers clear out of the junction, and that stored charge has to go somewhere—usually through the opposing switch in the same leg, as a current spike.

The parasitic diode in MOSFETs and IGBTs

Every n-channel power MOSFET contains an intrinsic PN junction between the body (p) region and the drain (n-) region, formed as an unavoidable consequence of the device structure, not as a designed-in component. This parasitic structure behaves like a conventional diode: it conducts when the source is more positive than the drain (for an n-channel device) and blocks in the opposite direction, following the same exponential turn-on behavior described in Forward Bias: Exponential Current, Knee Voltage. IGBTs don't have an intrinsic body diode in the same structural sense, but most IGBT modules include a discrete antiparallel diode for the same functional role, so everything here applies to that diode as well.

Why reverse recovery occurs: stored charge release

Reverse recovery occurs because forward conduction fills the junction's depletion region with injected minority carriers—electrons in the p-side, holes in the n-side—and those carriers don't vanish the instant the external circuit tries to reverse the current. Before the junction can support reverse voltage and return to its blocking state described in Reverse Bias: Leakage Current, Breakdown Mechanisms, that excess charge must be removed, either by recombination or by being swept out as an actual reverse current. The total charge that has to be removed is the reverse recovery charge, Qrr, and the removal process takes a finite time, trr.

Body diode conduction path in half-bridge and full-bridge topologies

In a half-bridge or full-bridge leg, the body diode of the off-state switch conducts during dead-time whenever inductor current needs a path—synchronous buck low-side FET, motor-drive freewheeling, or any topology where current direction doesn't match the commanded switch state. When the opposite switch turns on again, it doesn't just pick up the load current; it must also sink the reverse recovery current of the diode that was just conducting, briefly shorting the bus through both devices in series. This commutation event is where Qrr stops being a datasheet curiosity and starts being a loss and stress mechanism.

Reverse Recovery Charge (Qrr) and Reverse Recovery Time (trr)

Definition and measurement of Qrr: units and datasheet interpretation

Qrr, specified in nanocoulombs (nC) or microcoulombs (µC), is the total charge that flows in the reverse direction while the diode transitions from forward conduction to reverse blocking. Datasheets report it at a specific forward current (IF), di/dt, and junction temperature (Tj), and Qrr for a given part can range from under 10 nC for a fast low-voltage trench MOSFET body diode to several microcoulombs for a high-voltage IGBT co-pack diode—always check the exact test conditions, since a Qrr value quoted at 25°C and a modest di/dt tells you little about behavior at 150°C and the di/dt your circuit actually produces.

Definition and measurement of trr: soft vs. hard recovery

Trr, the reverse recovery time, is the interval from when diode current crosses zero going negative to when it returns to within a specified fraction (often 10%) of its peak reverse value, and it's split into two phases: ta (charge storage, fast current rise) and tb (tail, decay back to near zero). The ratio tb/ta, called the softness factor, distinguishes soft recovery (tb/ta ≥ 1, current decays gradually) from hard (or "snappy") recovery (tb/ta < 1, current collapses abruptly). Hard recovery is worse in practice because the sudden di/dt at current collapse rings against parasitic inductance, producing the voltage spikes covered in Switching Transients: VDS/VGS Overshoot, Ringing.

Relationship between Qrr and trr across temperature and current

Qrr and trr both increase with forward current and junction temperature, because higher IF injects more minority carriers and higher Tj slows recombination. A part might show Qrr roughly doubling from 25°C to 125°C at the same test current—consult the specific datasheet's Qrr-vs-Tj and Qrr-vs-IF curves rather than assuming a fixed multiplier, since the scaling is process-dependent and not linear across the full range.

How di/dt affects reverse recovery behavior

Faster commutation di/dt pulls carriers out more quickly, which tends to increase peak reverse current (Irr) while shortening ta, and the net effect on Qrr depends on whether carrier removal is dominated by sweep-out or recombination. Practically: a converter with fast gate drive and low loop inductance will see higher Irr spikes for the same diode than one with a slower edge, even though total Qrr changes only modestly.

Reverse Recovery Current and Overshoot Transients

Peak reverse current (Irr) and its origin

Irr is the maximum reverse current reached during the ta phase, and it originates directly from the rate of carrier removal: approximately Irr ≈ di/dt × ta for a first-order approximation, though real devices deviate due to carrier lifetime effects. Irr can reach several amps to tens of amps even in diodes rated for a few amps of forward current, because the removal current is set by di/dt, not by load current.

Reverse recovery tail current and body diode conduction phase

The tail current in phase tb is the slow decay of remaining stored charge as it recombines rather than sweeps out, and its duration determines how "soft" the turn-off looks to the rest of the circuit. A long soft tail dissipates energy gradually and gently; a short hard tail dumps the remaining charge's energy almost instantaneously into loop inductance.

Interaction with PCB parasitic inductance

Parasitic loop inductance converts the abrupt di/dt at the end of hard recovery into a voltage spike, V = L × di/dt, exactly as it does for ordinary switch turn-off. A loop inductance of 5 nH with a collapse di/dt of 500 A/µs produces a 2.5 V spike; real reverse recovery collapses can exceed 1000 A/µs, so even sub-10 nH layouts generate significant ringing superimposed on the switch-node waveform.

Power Loss Mechanisms During Reverse Recovery

Conduction loss during recovery: voltage × reverse current

Reverse recovery loss comes from the diode and the complementary switch both conducting current while the bus voltage is already present across the leg—instantaneous power is bus voltage times the reverse current flowing through the turning-on switch, integrated over the recovery interval. A rough per-event energy estimate is Err ≈ Qrr × VBUS / 2, scaled by the softness of the recovery.

Switching loss coupling to gate drive timing

Reverse recovery loss appears as extra turn-on loss in the device commutating the current, because that device must supply both the load current and the diode's reverse current simultaneously while VDS is still high. Faster gate drive increases di/dt, increasing Irr and the associated loss spike, so gate drive strength and reverse recovery are coupled design variables, not independent ones.

Temperature and voltage scaling of recovery losses

Recovery loss scales with bus voltage (linearly, through the Err ≈ Qrr·V/2 relationship) and with temperature (through Qrr's increase with Tj), so a converter that's efficient at 25°C bench test can show measurably worse efficiency at full operating temperature purely from body diode recovery growth—this is a common gap between datasheet bench numbers and field thermal performance.

Dead-time interaction and free-wheeling diode selection impact

Dead-time length controls how long the body diode conducts before commutation, and longer forced conduction generally means more stored charge to recover, though the relationship saturates once carrier lifetime is exceeded. Choosing a diode or synchronous FET with a faster, lower-Qrr body diode—or adding an external Schottky in parallel to steal conduction current away from the body diode—directly reduces the charge available for recovery.

Datasheet Parameters and Practical Measurement

Typical test conditions: current level, dI/dt, temperature

Manufacturers typically specify Qrr and trr at one or two forward currents (often rated IF and a fraction of it), a stated di/dt (commonly 100–500 A/µs for discrete MOSFETs), and both 25°C and a high Tj (100–175°C). These conditions rarely match your application exactly, so treat datasheet Qrr as an order-of-magnitude reference and verify with double-pulse testing in-circuit when losses matter.

Reading Qrr and trr from manufacturer datasheets

Look for the reverse recovery characteristics table and the accompanying test circuit schematic and waveform diagram—the test di/dt and IF are usually footnoted on the Qrr curve, not in the main parametric table. If the datasheet only lists a single Qrr number with no curve, treat it as a typical value at nominal conditions, not a guaranteed maximum across temperature and current.

Single-pulse vs. repetitive reverse recovery behavior

Single-pulse Qrr measurements (as in most datasheets) can understate repetitive switching losses, because at high switching frequency the junction may not fully cool or fully clear trapped charge between cycles, especially near the thermal limits of the package. For designs switching above a few hundred kHz, bench-verify Err at operating temperature and frequency rather than relying solely on the single-pulse datasheet value.

Design Trade-offs and Mitigation Strategies

Ultra-fast diode vs. standard body diode recovery characteristics

Schottky and SiC SBD alternatives

Schottky diodes and SiC Schottky barrier diodes are majority-carrier devices with no significant minority-carrier storage, so they exhibit negligible reverse recovery charge regardless of di/dt or temperature. Silicon Schottkys are limited to roughly 100–150 V blocking in practice; SiC SBDs extend this advantage to 600 V and above, which is why they dominate in high-voltage, high-frequency hard-switched designs like PFC boost stages.

Dead-time optimization to minimize reverse recovery overlap losses

Shortening dead-time reduces the duration of body diode conduction and the resulting stored charge, but dead-time that's too short risks shoot-through before the complementary switch has fully turned off—adaptive dead-time controllers that sense the switch-node transition are the usual production solution. The optimum sits at the shortest dead-time that still guarantees margin against the turn-off tolerance of both switches across temperature and current.

Gate drive speed and reverse recovery coupling

Slowing gate drive turn-on di/dt reduces Irr and the associated voltage spike, but it trades off against switching loss in the device itself, so the two must be tuned together rather than independently, typically by iterating gate resistor value against measured Err and VDS overshoot on the bench.

Reverse Recovery Impact on System Performance

EMI generation from reverse recovery current spikes

The fast di/dt at the end of hard recovery is a broadband noise source, radiating and conducting energy well into the tens-of-MHz range, and it's a frequent root cause of conducted EMI failures that don't correlate with the fundamental switching frequency. Snubbers, soft-recovery diode selection, and controlled gate drive slew rate are the standard countermeasures.

Thermal impact on converter efficiency

Recovery losses add directly to switch turn-on loss, and because Qrr grows with temperature, the loss itself is self-reinforcing in a poorly-cooled design—hotter junction, more Qrr, more loss, hotter junction. This feedback loop matters most in high-ambient or high-power-density designs where thermal margin is already tight.

Reliability implications: junction temperature and lifetime

Repeated high-energy recovery events raise local junction temperature excursions, which accelerate thermal-cycling-related wearout mechanisms in the die and package. Selecting diodes with lower Qrr, keeping dead-time tight, and verifying Err at worst-case temperature are all ways of protecting long-term reliability, not just steady-state efficiency.