Embedded Systems
Core embedded software engineering: microcontroller programming, peripheral drivers, and system bring-up.
400 topics · 42 with articles
Intern Engineer· 2 of 40
- ADC Key Specs: Resolution, ENOB, INL, DNL, SNRRead
- ADC Operation: SAR, Successive Approximation, ReferenceArticle coming
- Analog Comparator: Hysteresis and Wake-Up ApplicationRead
- CAN Controller: Arbitration, Frame Format, Bit TimingArticle coming
- CPU Core: ALU, Control Unit, Registers, PC, SPArticle coming
- Clock System: Internal RC, External Crystal, PLLArticle coming
- DAC Output: Voltage Mode, Current Mode, Settling TimeArticle coming
- DMA Controller: Channel, Priority, Circular, Double-BufferArticle coming
- Datasheet Reading: Block Diagram, Pinout, Electrical SpecsArticle coming
- Debugging Basics: Breakpoint, Watch, Step, Memory ViewArticle coming
- Development Board: Arduino, Discovery, Nucleo, DevKitArticle coming
- Flash and RAM Memory Organization in MCUArticle coming
- GPIO Alternate Function and Peripheral MultiplexingArticle coming
- GPIO Configuration: Input, Output, Open-Drain, Pull-Up/DownArticle coming
- I2C Peripheral: Address, ACK, Clock Stretching, Multi-MasterArticle coming
- IDE Options: STM32CubeIDE, SEGGER Embedded Studio, VS CodeArticle coming
- Interrupt Controller Basics: IRQ, Priority, MaskingArticle coming
- Interrupt Service Routine (ISR): Latency and ReentranceArticle coming
- Interrupt Vector Table: Address, Handler, PriorityArticle coming
- MCU Errata: Known Silicon Bugs and WorkaroundsArticle coming
- MCU Family Overview: STM32, nRF52, ESP32, RP2040, PICArticle coming
- MCU Selection Criteria: Core, Speed, Flash, RAM, PeripheralsArticle coming
- Microcontroller vs. Microprocessor vs. SoC DifferencesArticle coming
- NVIC (Nested Vectored Interrupt Controller) ConfigurationArticle coming
- Nested Interrupts and Interrupt Priority LevelsArticle coming
- PWM Generation: Period, Duty Cycle, Dead-TimeArticle coming
- Polling vs. Interrupt-Driven I/O Trade-offsArticle coming
- Power Management: Sleep, Stop, Standby Mode SelectionArticle coming
- Programming Interfaces: JTAG, SWD, UART ISP, USB DFUArticle coming
- RTC (Real-Time Clock): Calendar, Alarm, Battery BackupArticle coming
- Reference Manual vs. Datasheet vs. Application NoteArticle coming
- Register-Level Programming vs. HAL/LL Driver ComparisonArticle coming
- Reset Sources: Power-On, Brown-Out, Watchdog, SoftwareArticle coming
- SPI Peripheral: Master/Slave, CPOL, CPHA, NSS ControlArticle coming
- Timer / Counter: Modes (Free-Run, Output Compare, Input Capture)Article coming
- Toolchain Setup: Compiler (GCC-ARM), Linker, DebuggerArticle coming
- UART/USART: Baud Rate, Parity, Stop Bits, Flow ControlArticle coming
- USB Device Controller: Endpoint, Descriptor, EnumerationArticle coming
- Von Neumann vs. Harvard Architecture ComparisonArticle coming
- Watchdog Timer (WDT): Independent and Window WDTArticle coming
Junior Engineer· 0 of 40
- 1-Wire Protocol: Parasite Power, Search AlgorithmArticle coming
- CAN 2.0A and 2.0B Frame: SOF, ID, DLC, Data, CRCArticle coming
- CAN Bit Timing: Propagation Segment, Phase SegmentsArticle coming
- CAN Bus Termination: 120 Ω and Split TerminationArticle coming
- CAN Error Frames: Active, Passive, Bus-Off State MachineArticle coming
- CAN FD: Higher Baud Rate, Larger Payload (64 Bytes)Article coming
- Ethernet: PHY Layer, MII/RMII Interface, Auto-NegotiationArticle coming
- I2C Bus Recovery: Stuck SDA / SCL ProcedureArticle coming
- I2C Clock Stretching and Multi-Master ArbitrationArticle coming
- I2C Protocol: 7-Bit and 10-Bit AddressingArticle coming
- I2C Pull-Up Resistor Calculation: Rise Time vs. Bus CapArticle coming
- I2S / PCM Audio Interface: BCLK, LRCLK, SDATAArticle coming
- LIN Bus: Break Field, Sync, ID, Data, ChecksumArticle coming
- LIN Master/Slave Schedule Table and Frame SlotsArticle coming
- MDIO: PHY Register Access and ConfigurationArticle coming
- MIPI CSI-2: Lane Protocol for Camera Sensor DataArticle coming
- MIPI DSI: Display Serial Interface Packet StructureArticle coming
- MIPI I3C: Multi-Drop, Higher Speed Successor to I2CArticle coming
- Modbus ASCII: Framing and LRC CheckArticle coming
- Modbus RTU: Function Codes, CRC CalculationArticle coming
- PDM (Pulse Density Modulation) Microphone InterfaceArticle coming
- PMBus: Power Management Commands over SMBusArticle coming
- Quad-SPI (QSPI) and Octo-SPI for Flash AccessArticle coming
- RS-232 Voltage Levels and MAX232 Level ShifterArticle coming
- RS-485 Half-Duplex Differential Bus: Drive Enable TimingArticle coming
- RS-485 Termination Resistor and Fail-Safe BiasArticle coming
- SMBus: Alert Line, Packet Error Check (PEC)Article coming
- SPI DMA Transfer for High-Speed PeripheralsArticle coming
- SPI Full-Duplex vs. Half-Duplex OperationArticle coming
- SPI Multi-Slave: NSS Hardware vs. Software SelectArticle coming
- SPI Protocol: Clock Polarity (CPOL) and Phase (CPHA) ModesArticle coming
- SpaceWire / MIL-STD-1553: Avionics Bus ProtocolsArticle coming
- UART Baud Rate Error Calculation and ToleranceArticle coming
- UART Frame Format: Start, Data, Parity, Stop BitsArticle coming
- UART Hardware Flow Control: RTS/CTS LinesArticle coming
- USB CDC (Virtual COM Port): ACM SubclassArticle coming
- USB DFU Class: Firmware Upgrade over USBArticle coming
- USB Full-Speed (12 Mbps): Enumeration and DescriptorsArticle coming
- USB HID Class: Report Descriptor, Boot ProtocolArticle coming
- USB MSC (Mass Storage): SCSI Command Set over USBArticle coming
Middle Engineer· 0 of 120
- AHB-Lite: Single-Layer Master, Burst TransactionsArticle coming
- APB Bridge: Low-Bandwidth Peripheral AccessArticle coming
- ARM AMBA Bus: AHB-Lite, APB, AXI Interface OverviewArticle coming
- ARM CMSIS: Core, DSP, NN, RTOS, Driver LayersArticle coming
- ARM Cortex-M Family: M0, M0+, M3, M4, M7, M23, M33, M55Article coming
- AUTOSAR OS: Task, ISR, Alarm, Resource, Schedule TableArticle coming
- Binary Semaphore: ISR-to-Task Synchronization PatternArticle coming
- Bit-Banding: Atomic Single-Bit Read-Write in SRAM/PeripheralArticle coming
- Bus Matrix: Multi-Master, Multi-Slave Concurrent AccessArticle coming
- CMSIS-DSP: Fixed-Point and Floating-Point Signal FunctionsArticle coming
- CMSIS-NN: Neural Network Kernels for Cortex-M InferenceArticle coming
- CPU Load Measurement: DWT CYCCNT Idle vs. ActiveArticle coming
- Cache Coherency Issues with DMA and Shared MemoryArticle coming
- Cache Maintenance Operations: Invalidate, Clean, FlushArticle coming
- CoreSight Components: ETM, ITM, DWT, MTB, TPIUArticle coming
- CoreSight Debug Architecture: DAP, SW-DP, JTAG-DPArticle coming
- Cortex-M Exception Priority: Fixed and ConfigurableArticle coming
- Cortex-M Memory Map: Code, SRAM, Peripheral, PPB RegionsArticle coming
- Cortex-M Power Modes: Sleep, Deep Sleep, WFI, WFEArticle coming
- Cortex-M Security Extension (Cortex-M23/M33): SAU, IDAUArticle coming
- Cortex-M4/M33 DSP Extensions: SIMD, Saturating ArithmeticArticle coming
- Cortex-M55 Helium (M-Profile Vector Extension, MVE)Article coming
- Cortex-M7 Cache: 4-Way Set-Associative I-Cache and D-CacheArticle coming
- Counting Semaphore: Resource Pool ManagementArticle coming
- DWT: Cycle Counter (CYCCNT), Data WatchpointsArticle coming
- Deadline-Monotonic and EDF Scheduling AlgorithmsArticle coming
- ESP-IDF: FreeRTOS Base, Partition Table, NVS FlashArticle coming
- ESP32 Architecture: Xtensa LX6, Wi-Fi, BLE, PSRAMArticle coming
- ESP32 Wi-Fi: Station, SoftAP, WPA3, Power-Save ModesArticle coming
- ESP32-C3 / C6: RISC-V Core, Wi-Fi 6, BLE 5.3Article coming
- ETM Instruction Trace: Cycle-Accurate Execution RecordingArticle coming
- Event-Driven Wake-Up: SEV and WFE Instruction PairArticle coming
- Exception Entry and Return: EXC_RETURN Value EncodingArticle coming
- Exception Model: Reset, NMI, HardFault, MemManage, BusFaultArticle coming
- FPU (Cortex-M4/M7/M33): Single-Precision IEEE 754Article coming
- FPU Lazy Stacking and Context Save on Interrupt EntryArticle coming
- FreeRTOS Event Groups: xEventGroupSetBits, WaitBitsArticle coming
- FreeRTOS Queue: xQueueCreate, Send, Receive, PeekArticle coming
- FreeRTOS Task Creation: xTaskCreate, Stack Size, PriorityArticle coming
- FreeRTOS Trace: Tracealyzer Integration and TimelineArticle coming
- FreeRTOS+FAT: File System for Embedded StorageArticle coming
- FreeRTOS+TCP: Lightweight TCP/IP Stack IntegrationArticle coming
- Heap Memory Management: heap_1 to heap_5 ComparisonArticle coming
- ITM Stimulus Ports: Printf-Style Trace Without HaltArticle coming
- Idle Task and Idle Hook: Low-Power or Background WorkArticle coming
- MPU Region Configuration: Base, Size, Access PermissionsArticle coming
- Memory Protection Unit (MPU): Region, Attributes, PermissionsArticle coming
- Message Buffer: Variable-Length Message PassingArticle coming
- Mutex: Mutual Exclusion and Priority InheritanceArticle coming
- NVIC: Priority Grouping, Preemption, and Sub-PriorityArticle coming
- Non-Secure Callable (NSC) Function GatewayArticle coming
- Nordic Matter (Thread/BLE) and Apple HomeKit IntegrationArticle coming
- OSEK/VDX OS: Conformance Classes (BCC1, ECC2)Article coming
- Operating Modes: Thread Mode and Handler ModeArticle coming
- PIO (Programmable I/O): State Machine for Custom ProtocolsArticle coming
- POSIX PSE51 Profile: Subset for Real-Time EmbeddedArticle coming
- Preemptive Scheduling: Highest Ready Task RunsArticle coming
- Priority Ceiling Protocol: Alternative to InheritanceArticle coming
- Priority Inversion Problem and Priority Inheritance SolutionArticle coming
- Privilege Levels: Privileged and Unprivileged ExecutionArticle coming
- Processor Registers: R0–R12, SP (R13), LR (R14), PC (R15)Article coming
- Program Status Register: APSR, IPSR, EPSR (xPSR)Article coming
- Queue Sets: Blocking on Multiple Queues SimultaneouslyArticle coming
- RP2040: Dual Cortex-M0+, PIO State Machine, USBArticle coming
- RTOS Concepts: Task, Scheduler, Context Switch, TCBArticle coming
- Rate-Monotonic Scheduling (RMS) Schedulability TestArticle coming
- Recursive Mutex: Re-entrant Locking for Same TaskArticle coming
- Round-Robin Scheduling: Equal Priority Time-SlicingArticle coming
- STM32 ADC: Oversampling, Injected, Regular, DMA ChainArticle coming
- STM32 Alternate Function Mapping (AFR Registers)Article coming
- STM32 Clock Tree: HSI, HSE, LSI, LSE, PLL ConfigurationArticle coming
- STM32 Crypto Accelerator: AES-128/192/256, HASH, TRNGArticle coming
- STM32 DMA: Stream, Channel, Priority, FIFO, BurstArticle coming
- STM32 FDCAN: CAN FD Protocol, Rx FIFO, Tx EventArticle coming
- STM32 Family Overview: F0–F7, G0–G4, H7, L0–L5, U5, WBArticle coming
- STM32 Flash: Dual Bank, PCROP, WRP, OTP SectorArticle coming
- STM32 GPIO Registers: MODER, OTYPER, OSPEEDR, PUPDR, IDR, ODRArticle coming
- STM32 HAL Library: Init, DeInit, Poll, IT, DMA FunctionsArticle coming
- STM32 LL (Low-Layer) Driver: Register-Level MacrosArticle coming
- STM32 LPTIM: Low-Power Timer Wake from StandbyArticle coming
- STM32 LPUART: Low-Power UART Wake from Stop ModeArticle coming
- STM32 RCC Register: System Clock Selection, AHB/APB DividersArticle coming
- STM32 RTC: Calendar, Alarm, Tamper, TimestampArticle coming
- STM32 SBSFU: Secure Boot and Firmware Update FrameworkArticle coming
- STM32 TIM Advanced: PWM, Input Capture, Encoder ModeArticle coming
- STM32 USB Device Library: CDC, HID, MSC StackArticle coming
- STM32CubeIDE: Debug, Live Watch, SWV Timeline ViewArticle coming
- STM32CubeMX: Pin Configurator, Clock Tree, Code GeneratorArticle coming
- STM32WB CoProcessor Table (CPT): RF Stack UpdateArticle coming
- STM32WB: BLE + 802.15.4 Dual-Core ArchitectureArticle coming
- Software Timer: xTimerCreate, Start, Stop, Reset, Change PeriodArticle coming
- Stack Overflow Detection: Stack Canary and High-Water MarkArticle coming
- Stack Pointer Types: MSP (Main) and PSP (Process)Article coming
- Stream Buffer: Byte-Level ISR-to-Task Data StreamArticle coming
- SysTick Timer: 24-bit Down-Counter, RTOS Tick SourceArticle coming
- Task States: Running, Ready, Blocked, Suspended, DeletedArticle coming
- ThreadX / Azure RTOS: Preemption-Threshold FeatureArticle coming
- Thumb-2 Instruction Set: 16-bit and 32-bit Mixed EncodingArticle coming
- Tick Hook: High-Frequency Periodic CallbackArticle coming
- TrustZone-M: Secure and Non-Secure World PartitioningArticle coming
- Worst-Case Execution Time (WCET) Analysis TechniquesArticle coming
- Zephyr Devicetree: HW Description, Bindings, OverlaysArticle coming
- Zephyr Kconfig: Build-Time Configuration SystemArticle coming
- Zephyr Message Queue and MailboxArticle coming
- Zephyr Power Management: Device and System PMArticle coming
- Zephyr RTOS Architecture: Kernel, Subsystems, DriversArticle coming
- Zephyr RTOS on nRF52: Board Definition, DTS, DevicetreeArticle coming
- Zephyr Synchronization: k_sem, k_mutex, k_condvarArticle coming
- Zephyr Threads: K_THREAD_DEFINE, Stack, PriorityArticle coming
- Zephyr Work Queue: Deferred Processing from ISRArticle coming
- nRF5 SDK vs. nRF Connect SDK (Zephyr-Based)Article coming
- nRF52 BLE Advertising: Extended, Periodic AdvertisingArticle coming
- nRF52 BLE Connection: Parameters, PHY, Data Length Ext.Article coming
- nRF52 Bootloader: Open Bootloader and DFU over BLE/UARTArticle coming
- nRF52 GATT Profile Design: Service, Characteristic, DescriptorArticle coming
- nRF52 Power Profiler Kit (PPK2): Current MeasurementArticle coming
- nRF52 Security Manager: Pairing, Bonding, LE Secure ConnectionsArticle coming
- nRF52 SoftDevice: BLE Protocol Stack ArchitectureArticle coming
- nRF52 UART, SPI, I2C, PDM, I2S Peripheral (EasyDMA)Article coming
- nRF52840: ARM Cortex-M4, BLE 5.3, 802.15.4, USBArticle coming
Senior Engineer· 1 of 80
- A/B Partition Layout: Active and Backup Firmware SlotsArticle coming
- Anti-Rollback Counter: Monotonic NVM Counter in eFuse/OTPArticle coming
- Bootloader Basics: Reset Handler Jump to ApplicationArticle coming
- Bootloader Magic Number: Boot Decision LogicArticle coming
- Buildroot: Board Configuration, Package, BR2_PACKAGEArticle coming
- CRC / SHA-256 Firmware Integrity Check in BootloaderArticle coming
- Character Device Driver: file_operations, cdev_addArticle coming
- Compressed Firmware Storage: LZ4, zlib DecompressionArticle coming
- Copy Table: LMA to VMA Data InitializationArticle coming
- DMA Engine API: dmaengine_prep_slave_sg, dma_async_issueArticle coming
- Debugfs: Kernel Debug Information ExportArticle coming
- Device Tree (DTS): Node, Property, Compatible StringArticle coming
- Device Tree Bindings: Documenting Compatible StringsArticle coming
- Device Tree Overlay (DTBO): Dynamic HW DescriptionArticle coming
- Differential OTA Update: Binary Patch (bsdiff, xdelta)Article coming
- EEPROM Emulation in Internal Flash (STM32 EEPROM Emul)Article coming
- ELF File Structure: .text, .data, .bss, .rodata SectionsArticle coming
- Embedded Linux Debug: KGDB, JTAG, ftrace, perfArticle coming
- External SPI EEPROM / NOR Flash Driver DesignArticle coming
- FIT Image (Flattened Image Tree): Multi-Component BootArticle coming
- Factory Reset and Safe Firmware Fallback MechanismArticle coming
- FatFS: FAT12/16/32 for SD Card and USB Mass StorageArticle coming
- Flash Erase-Write-Read Cycle and Endurance LimitsArticle coming
- Heap Fragmentation: First-Fit, Best-Fit, dlmallocArticle coming
- Hypervisor for Mixed-Criticality: Jailhouse, Xen on ARMArticle coming
- In-Application Programming (IAP) via UART / CANArticle coming
- Kernel Configuration: menuconfig, defconfig, .configArticle coming
- Kernel Hardening: ASLR, Stack Canary, CONFIG_FORTIFYArticle coming
- Kernel Memory: kmalloc, vmalloc, DMA Coherent AllocArticle coming
- Kernel Module: init_module, cleanup_module, MakefileArticle coming
- Kernel Timer: hrtimer vs. timer_list ComparisonArticle coming
- Key Provisioning: Certificate Injection at ManufacturingRead
- Linker Script (.ld): Memory Regions, Sections, SymbolsArticle coming
- Linux Boot Sequence: ROM → SPL → U-Boot → Kernel → InitArticle coming
- Linux CAN SocketCAN: CAN Raw Socket, can_frameArticle coming
- Linux GPIO Subsystem: gpiod_get, gpiod_direction_outputArticle coming
- Linux I2C Driver: i2c_driver, i2c_smbus_read_byte_dataArticle coming
- Linux IIO (Industrial I/O): ADC, DAC, IMU SubsystemArticle coming
- Linux Input Subsystem: input_dev, input_report_keyArticle coming
- Linux Interrupt: request_irq, free_irq, IRQ ThreadingArticle coming
- Linux Power Management: Runtime PM, System Suspend/ResumeArticle coming
- Linux Regulator Framework: voltage-regulator DriverArticle coming
- Linux SPI Driver: spi_driver, spi_transfer, spi_messageArticle coming
- Linux Security Modules: SELinux, AppArmor PolicyArticle coming
- Linux UART (TTY) Driver: uart_driver, uart_opsArticle coming
- LittleFS: Log-Structured, Power-Fail-Safe FilesystemArticle coming
- MCUboot: Open-Source Bootloader Configuration (Zephyr)Article coming
- Memory Map Analysis: .map File Symbol LocationsArticle coming
- Memory Protection Unit (MPU): Region Isolation and PrivilegeArticle coming
- Mmap for Zero-Copy: remap_pfn_range, vm_faultArticle coming
- NAND Flash Controller: Bad Block Management, ECCArticle coming
- OPTEE-OS: Trusted Execution Environment on Cortex-AArticle coming
- OTA Update Architecture: Download, Verify, Swap, RebootArticle coming
- OpenWrt for Embedded Networking DevicesArticle coming
- Pinctrl Subsystem: Pin Mux and Pin ConfigurationArticle coming
- Platform Driver Model: probe, remove, of_match_tableArticle coming
- Power-Fail Safe Flash Write: Atomic Page Update PatternArticle coming
- QSPI Flash XIP: Memory-Mapped Mode ConfigurationArticle coming
- SPIFFS (SPI Flash File System): Deprecated vs. LittleFSArticle coming
- Secure Boot on Embedded Linux: U-Boot + FIT + IMA/EVMArticle coming
- Secure Boot: ECDSA / RSA Signature Verification ChainArticle coming
- Stack Size Calculation: Worst-Case Interrupt NestingArticle coming
- Stack and Heap Layout: Growth Direction, Size ConfigArticle coming
- Startup File: Reset_Handler, __libc_init_array, main CallArticle coming
- Static Memory Allocation vs. Dynamic Allocation in EmbeddedArticle coming
- Sysfs Interface: kobject, kset, Attribute FilesArticle coming
- Threaded IRQ: request_threaded_irq for Long ISR HandlersArticle coming
- Trusted Firmware-M (TF-M): BL2 Secure Boot IntegrationArticle coming
- U-Boot Commands: fatload, bootz, booti, tftp, nandArticle coming
- U-Boot Verified Boot: FIT Image Signature and HashArticle coming
- U-Boot: Environment Variables, bootcmd, bootargsArticle coming
- USB DFU Bootloader: DFU Class, Alternate SettingsArticle coming
- User-Kernel Space: copy_to_user, copy_from_userArticle coming
- Wear Leveling: Static, Dynamic, Global AlgorithmsArticle coming
- Workqueue: schedule_work, INIT_WORK, Delayed WorkArticle coming
- XIP (Execute-in-Place) from External NOR FlashArticle coming
- Yocto Image Customization: IMAGE_INSTALL, DISTRO_FEATURESArticle coming
- Yocto Project: Layer, Recipe (.bb), Bitbake CommandsArticle coming
- eFuse / OTP Burning for Device Identity and Config FuseArticle coming
- ioctl Interface: unlocked_ioctl, compat_ioctl DesignArticle coming
Lead Engineer· 0 of 40
- Anti-Tamper Design: Mesh, Voltage Glitch, Temperature SensorArticle coming
- Attestation: Device Identity and Quote VerificationArticle coming
- CERT C Secure Coding Standard: Key Rules (INT, MEM, STR)Article coming
- CWE (Common Weakness Enumeration) for EmbeddedArticle coming
- Code Coverage Criteria: Statement, Branch, MC/DCArticle coming
- Cyclomatic Complexity: McCabe Metric and LimitArticle coming
- DO-178C: Software Levels (DAL A–E) for AviationArticle coming
- DTLS 1.3: Datagram Transport for CoAP and MQTT-SNArticle coming
- Dynamic Analysis: Valgrind, AddressSanitizer, MemorySanitizerArticle coming
- EN 50128: Railway Software Safety StandardArticle coming
- EU Cyber Resilience Act (CRA): Embedded Product RequirementsArticle coming
- FIPS 140-3: Cryptographic Module Validation Levels 1–4Article coming
- FMEDA: Failure Modes, Effects, and Diagnostic AnalysisArticle coming
- Failure Mode and Effect Analysis (FMEA) for SoftwareArticle coming
- Fault Injection Defense: Redundant Execution, DiversityArticle coming
- Fault Tree Analysis (FTA): Top Event, AND/OR GatesArticle coming
- Firmware Extraction and Reverse Engineering DefenseArticle coming
- Formal Methods for Safety: Abstract Interpretation, Coq, SPARK AdaArticle coming
- Hardware Security Module (HSM) Driver: PKCS#11 APIArticle coming
- IEC 61508: Functional Safety Lifecycle (SIL 1–4)Article coming
- IEC 61511: Process Industry Safety (SIL and PFD)Article coming
- IEC 62304: Medical Device Software Lifecycle (Class A/B/C)Article coming
- IEC 62443-4-2: Component Security Level (SL1–SL4)Article coming
- ISO 26262 Part 6: Software Requirements and ASIL DecompositionArticle coming
- ISO 26262: Automotive Functional Safety (ASIL A–D)Article coming
- ISO/SAE 21434: Automotive Cybersecurity EngineeringArticle coming
- MC/DC (Modified Condition/Decision Coverage) for DAL AArticle coming
- MISRA-C Rule Examples: No Dynamic Allocation, No RecursionArticle coming
- MISRA-C:2012: Mandatory, Required, Advisory Rule CategoriesArticle coming
- Penetration Testing Embedded: UART, JTAG, JTAG Lock BypassArticle coming
- Post-Quantum Cryptography on MCU: Kyber-512, DilithiumArticle coming
- SBOM (Software Bill of Materials): CycloneDX for EmbeddedArticle coming
- Secure Boot Chain: ROM BL0 → BL1 → BL2 → KernelArticle coming
- Secure Coding: Buffer Overflow, Integer Overflow PreventionArticle coming
- Secure Element Integration: ATECC608B, SE050 APIArticle coming
- Side-Channel Countermeasures: Masking, Blinding, Constant-TimeArticle coming
- Static Analysis Tools: PC-lint Plus, Polyspace, Klocwork, Helix QACArticle coming
- TLS 1.3 on MCU: mbedTLS, wolfSSL, Mbed TLS HandshakeArticle coming
- Trusted Execution Environment (TEE): TrustZone-M, TrustZone-AArticle coming
- UNECE WP.29 R155 and R156: Vehicle Cyber and OTA RegulationArticle coming
Staff Engineer· 1 of 40
- Asymmetric Multi-Processing (AMP): Cortex-A + Cortex-MArticle coming
- Branch Prediction: Static, Dynamic (2-bit Saturating Counter)Article coming
- Bus Interconnect: AHB Matrix, AXI Crossbar PerformanceArticle coming
- CPU Affinity: taskset, isolcpus for Real-Time Task IsolationArticle coming
- CPU Performance Metrics: MIPS, CoreMark, DMIPSArticle coming
- Cache Architecture: I-Cache, D-Cache, Unified L2 CacheArticle coming
- Cache Associativity: Direct-Mapped, 2-Way, 4-Way, FullyArticle coming
- Cache Coherence in Multi-Core: MESI Protocol on ARMArticle coming
- Cache Prefetching: Hardware and Software Prefetch InstructionsArticle coming
- Cache Write Policies: Write-Back vs. Write-ThroughArticle coming
- Co-Processing: FPGA Offload for MCU AccelerationArticle coming
- DMA Performance: Burst Length, FIFO Threshold OptimizationArticle coming
- DVFS (Dynamic Voltage Frequency Scaling) Linux cpufreqArticle coming
- ETM Trace and Instruction-Level ProfilingArticle coming
- Embedded Hypervisor: Jailhouse, XEN, bhyve on ARMArticle coming
- Execution Profiling: Gprof, Callgrind, TracyArticle coming
- FPGA Soft-Core CPU: MicroBlaze, NIOS II, PicoRV32Article coming
- Functional Safety Architectural Patterns: Lockstep, Safety IslandArticle coming
- Heterogeneous SoC: CPU + DSP + GPU + NPU ArchitectureArticle coming
- Latency Measurement: Cyclictest, Latency HistogramArticle coming
- Lock-Free Programming: Atomic Operations, Memory OrderingArticle coming
- MMU (Memory Management Unit): Page Table Walk, ASIDArticle coming
- Memory Bandwidth and Latency Profiling: ARM DS-5, perfArticle coming
- Memory Barriers: DMB, DSB, ISB on ARM ArchitectureArticle coming
- OpenAMP: Remoteproc and RPMsg for AMP CommunicationArticle coming
- Out-of-Order Execution and Register RenamingArticle coming
- Pipeline Hazards: Data Hazard, Control Hazard, StructuralArticle coming
- Pipeline Stages: Fetch, Decode, Execute, Memory, Write-BackRead
- Power Profiling: J-Link Energy, PPK2, Advanced Energy MonitorArticle coming
- RISC-V Architecture: ISA Base (RV32I) and Extensions (M, A, F, C)Article coming
- RISC-V Physical Memory Protection (PMP) ConfigurationArticle coming
- RISC-V Privileged Spec: Machine, Supervisor, User ModeArticle coming
- RISC-V Vector Extension (RVV): SIMD for Embedded DSPArticle coming
- Real-Time Performance on Embedded Linux: PREEMPT_RT PatchArticle coming
- SoC Platform Selection: NXP i.MX, Raspberry Pi CM4, JetsonArticle coming
- Superscalar Execution: Multiple Issue Units in ParallelArticle coming
- Symmetric Multi-Processing (SMP): Linux on Quad-Core A55Article coming
- TLB (Translation Lookaside Buffer): Virtual-to-Physical MapArticle coming
- Thermal Throttling: CPU Frequency Reduction on OverheatArticle coming
- Zephyr RTOS on RISC-V: Build and Boot ProcessArticle coming
Distinguished Engineer· 38 of 40
- Anomaly Detection on MCU: Autoencoder and PCA ApproachArticle coming
- Audio Classification: Mel-Spectrogram + CNN on Cortex-MArticle coming
- CMSIS-NN: ARM-Optimized Kernel Library for Cortex-MRead
- Camera Interface: DVP (Digital Video Port) and MIPI CSI-2Read
- Color Space Conversion: RGB888 → RGB565 → GrayscaleRead
- Continual / Incremental Learning on Embedded DevicesRead
- EThos-U55 / U65: Arm ML Processor for Cortex-M SystemsRead
- Edge AI Overview: Inference at the Device vs. CloudRead
- Edge Impulse: Data Collection, Training, Deployment to MCURead
- Embedded OpenCV: ARM Neon OptimizationRead
- Face Detection on MCU: Haar Cascade, MobileNet-SSDRead
- Federated Learning on MCU: Privacy-Preserving On-DeviceRead
- Future Edge AI: RISC-V AI Extensions, Chiplet NPU IntegrationRead
- Gesture Recognition: IMU Data → TFLite Micro InferenceRead
- Image Preprocessing on MCU: Resize, Crop, NormalizeRead
- JPEG Decode on MCU: libjpeg-turbo, STM32 JPEG HW IPRead
- Keyword Spotting (KWS): DS-CNN on Cortex-M for Wake-WordRead
- Knowledge Distillation: Teacher-Student Model CompressionRead
- MAX78000: Ultra-Low-Power CNN AcceleratorRead
- MCU AI Frameworks: TensorFlow Lite Micro (TFLite Micro)Read
- MCU Inference Benchmarks: MLPerf Tiny ResultsRead
- Memory Optimization: Scratch Buffer, In-Place OperationsRead
- Model Deployment Pipeline: CI/CD for Edge AI ModelsRead
- Model Pruning: Weight Magnitude, Structured vs. UnstructuredRead
- NDP120 / NDP200: Syntiant Neural Decision ProcessorRead
- Neuromorphic Computing: Intel Loihi, BrainScaleS BasicsRead
- ONNX Runtime for Embedded: Inference on Cortex-ARead
- OTA Update for AI Model: Delta Model Update StrategyRead
- Object Detection on MCU: YOLO-Nano, TinyYOLORead
- OpenMV Cam: Machine Vision on STM32H7Read
- Operator Fusion: Reducing Memory and Compute OverheadRead
- Optical Flow on MCU: Lucas-Kanade for UAV StabilizationRead
- Person Detection: MobileNet-v2 on CMSIS-NNRead
- Post-Training Quantization: FP32 → INT8 Weight ConversionRead
- PyTorch Mobile: Lightweight Inference on Embedded LinuxRead
- Quantization-Aware Training (QAT): Simulated QuantizationRead
- STM32N6: Neural ART Accelerator on STM32Read
- TFLite Micro Workflow: Train → Convert → Quantize → DeployRead
- Time-Series Classification: 1D CNN on Sensor DataRead
- TinyML Benchmarking: eAI, TinyMLPerf, MLCommonsRead